| Message ID | 20220327223927.20848-3-granquet@baylibre.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | drm/mediatek: Add mt8195 DisplayPort driver | expand |
| Context | Check | Description |
|---|---|---|
| robh/patch-applied | success | |
| robh/checkpatch | success | |
| robh/dtbs-check | success | |
| robh/dt-meta-schema | fail | build log |
On Mon, 28 Mar 2022 00:39:07 +0200, Guillaume Ranquet wrote: > From: Markus Schneider-Pargmann <msp@baylibre.com> > > This controller is present on several mediatek hardware. Currently > mt8195 and mt8395 have this controller without a functional difference, > so only one compatible field is added. > > The controller can have two forms, as a normal display port and as an > embedded display port. > > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > --- > .../display/mediatek/mediatek,dp.yaml | 100 ++++++++++++++++++ > 1 file changed, 100 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/display/mediatek/mediatek,dp.example.dts:24:18: fatal error: dt-bindings/power/mt8195-power.h: No such file or directory 24 | #include <dt-bindings/power/mt8195-power.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[1]: *** [scripts/Makefile.lib:378: Documentation/devicetree/bindings/display/mediatek/mediatek,dp.example.dt.yaml] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1398: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1609955 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Mon, Mar 28, 2022 at 12:39:07AM +0200, Guillaume Ranquet wrote: > From: Markus Schneider-Pargmann <msp@baylibre.com> > > This controller is present on several mediatek hardware. Currently > mt8195 and mt8395 have this controller without a functional difference, > so only one compatible field is added. > > The controller can have two forms, as a normal display port and as an > embedded display port. > > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > --- > .../display/mediatek/mediatek,dp.yaml | 100 ++++++++++++++++++ > 1 file changed, 100 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml > new file mode 100644 > index 000000000000..802cc406c72b > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml > @@ -0,0 +1,100 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Display Port Controller > + > +maintainers: > + - CK Hu <ck.hu@mediatek.com> > + - Jitao shi <jitao.shi@mediatek.com> > + > +description: | > + Device tree bindings for the Mediatek (embedded) Display Port controller > + present on some Mediatek SoCs. > + > +properties: > + compatible: > + items: > + - const: mediatek,mt8195-dp-tx > + - const: syscon Add something to the above description to convince me this is a syscon. If you need a regmap, the driver can create one. 'syscon' is really only needed if there's not a specific driver. Rob
>This controller is present on several mediatek hardware. Currently >mt8195 and mt8395 have this controller without a functional difference, >so only one compatible field is added. > >The controller can have two forms, as a normal display port and as an >embedded display port. > >Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> >Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> >--- > .../display/mediatek/mediatek,dp.yaml | 100 ++++++++++++++++++ > 1 file changed, 100 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml > >diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml >new file mode 100644 >index 000000000000..802cc406c72b >--- /dev/null >+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml >@@ -0,0 +1,100 @@ >+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >+%YAML 1.2 >+--- >+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml# >+$schema: http://devicetree.org/meta-schemas/core.yaml# >+ >+title: Mediatek Display Port Controller s/Mediatek/MediaTek/ >+ >+maintainers: >+ - CK Hu <ck.hu@mediatek.com> >+ - Jitao shi <jitao.shi@mediatek.com> >+ >+description: | >+ Device tree bindings for the Mediatek (embedded) Display Port controller s/Mediatek/MediaTek/ >+ present on some Mediatek SoCs. s/Mediatek/MediaTek/ >+ >+properties: >+ compatible: >+ items: >+ - const: mediatek,mt8195-dp-tx >+ - const: syscon >+ >+ reg: >+ maxItems: 1 >+ >+ interrupts: >+ maxItems: 1 >+ >+ clocks: >+ items: >+ - description: faxi clock >+ >+ clock-names: >+ items: >+ - const: faxi >+ >+ phys: >+ maxItems: 1 >+ >+ phy-names: >+ items: >+ - const: dp >+ >+ power-domains: >+ maxItems: 1 >+ >+ ports: >+ $ref: /schemas/graph.yaml#/properties/ports >+ properties: >+ port@0: >+ $ref: /schemas/graph.yaml#/properties/port >+ description: Input endpoint of the controller, usually dp_intf >+ >+ port@1: >+ $ref: /schemas/graph.yaml#/properties/port >+ description: Output endpoint of the controller >+ >+ required: >+ - port@0 >+ >+required: >+ - compatible >+ - reg >+ - interrupts >+ - ports >+ >+additionalProperties: false >+ >+examples: >+ - | >+ #include <dt-bindings/interrupt-controller/arm-gic.h> >+ #include <dt-bindings/power/mt8195-power.h> >+ edp_tx: edisplay-port-tx@1c500000 { >+ compatible = "mediatek,mt8195-dp-tx","syscon"; >+ reg = <0 0x1c500000 0 0x8000>; >+ interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>; >+ power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>; >+ pinctrl-names = "default"; >+ pinctrl-0 = <&edp_pin>; >+ phys = <&dp_phy>; >+ phy-names = "dp"; >+ >+ ports { >+ #address-cells = <1>; >+ #size-cells = <0>; >+ >+ port@0 { >+ reg = <0>; >+ edp_in: endpoint { >+ remote-endpoint = <&dp_intf0_out>; >+ }; >+ }; >+ port@1 { >+ reg = <1>; >+ edp_out: endpoint { >+ remote-endpoint = <&panel_in>; >+ }; >+ }; >+ }; >+ }; >-- >2.34.1 > >
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml new file mode 100644 index 000000000000..802cc406c72b --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Display Port Controller + +maintainers: + - CK Hu <ck.hu@mediatek.com> + - Jitao shi <jitao.shi@mediatek.com> + +description: | + Device tree bindings for the Mediatek (embedded) Display Port controller + present on some Mediatek SoCs. + +properties: + compatible: + items: + - const: mediatek,mt8195-dp-tx + - const: syscon + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: faxi clock + + clock-names: + items: + - const: faxi + + phys: + maxItems: 1 + + phy-names: + items: + - const: dp + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input endpoint of the controller, usually dp_intf + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output endpoint of the controller + + required: + - port@0 + +required: + - compatible + - reg + - interrupts + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8195-power.h> + edp_tx: edisplay-port-tx@1c500000 { + compatible = "mediatek,mt8195-dp-tx","syscon"; + reg = <0 0x1c500000 0 0x8000>; + interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>; + power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&edp_pin>; + phys = <&dp_phy>; + phy-names = "dp"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + edp_in: endpoint { + remote-endpoint = <&dp_intf0_out>; + }; + }; + port@1 { + reg = <1>; + edp_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + };