Message ID | 20220114151727.2319915-10-conor.dooley@microchip.com |
---|---|
State | Superseded, archived |
Headers | show |
Series | Update the Icicle Kit device tree | expand |
Context | Check | Description |
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robh/checkpatch | warning | total: 0 errors, 1 warnings, 75 lines checked |
robh/dtbs-check | success | |
robh/dt-meta-schema | fail | build log |
robh/checkpatch | warning | total: 0 errors, 1 warnings, 75 lines checked |
robh/dtbs-check | success | |
robh/dt-meta-schema | fail | build log |
On Fri, 14 Jan 2022 15:17:21 +0000, conor.dooley@microchip.com wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > Add device tree bindings for the Microchip fpga fabric based "core" PWM controller. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > .../bindings/pwm/microchip,corepwm.yaml | 75 +++++++++++++++++++ > 1 file changed, 75 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/pwm/microchip,corepwm.example.dts:19:18: fatal error: dt-bindings/clock/microchip,mpfs-clock.h: No such file or directory 19 | #include "dt-bindings/clock/microchip,mpfs-clock.h" | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[1]: *** [scripts/Makefile.lib:373: Documentation/devicetree/bindings/pwm/microchip,corepwm.example.dt.yaml] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1413: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1580131 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
diff --git a/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml new file mode 100644 index 000000000000..26a77cde2465 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/microchip,corepwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip ip core PWM controller bindings + +maintainers: + - Conor Dooley <conor.dooley@microchip.com> + +description: | + corePWM is an 16 channel pulse width modulator FPGA IP + + https://www.microsemi.com/existing-parts/parts/152118 + +properties: + compatible: + items: + - const: microchip,corepwm-rtl-v4 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#pwm-cells": + const: 2 + + microchip,sync-update: + description: | + In synchronous mode, all channels are updated at the beginning of the PWM period. + Asynchronous mode is relevant to applications such as LED control, where + synchronous updates are not required. Asynchronous mode lowers the area size, + reducing shadow register requirements. This can be set at run time, provided + SHADOW_REG_EN is asserted. SHADOW_REG_EN is set by the FPGA bitstream programmed + to the device. + Each bit corresponds to a PWM channel & represents whether synchronous mode is + possible for the PWM channel. + + $ref: /schemas/types.yaml#/definitions/uint16 + default: 0 + + microchip,dac-mode: + description: | + Optional, per-channel Low Ripple DAC mode is possible on this IP core. It creates + a minimum period pulse train whose High/Low average is that of the chosen duty + cycle. This "DAC" will have far better bandwidth and ripple performance than the + standard PWM algorithm can achieve. + Each bit corresponds to a PWM channel & represents whether dac mode is enabled + that PWM channel. + + $ref: /schemas/types.yaml#/definitions/uint16 + default: 0 + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + #include "dt-bindings/clock/microchip,mpfs-clock.h" + pwm@41000000 { + compatible = "microchip,corepwm-rtl-v4"; + microchip,sync-update = /bits/ 16 <0>; + clocks = <&clkcfg CLK_FIC3>; + reg = <0x41000000 0xF0>; + #pwm-cells = <2>; + };