diff mbox series

[V1,XRT,Alveo,Infrastructure,2/9] Documentation: devicetree: bindings: add xrt group binding

Message ID 20211118210323.1070283-3-lizhi.hou@xilinx.com
State Superseded, archived
Headers show
Series XRT Alveo driver infrastructure overview | expand

Checks

Context Check Description
robh/checkpatch success
robh/dt-meta-schema fail build log

Commit Message

Lizhi Hou Nov. 18, 2021, 9:03 p.m. UTC
Create device tree binding document for xrt group device.

Signed-off-by: Sonal Santan <sonal.santan@xilinx.com>
Signed-off-by: Max Zhen <max.zhen@xilinx.com>
Signed-off-by: Lizhi Hou <lizhi.hou@xilinx.com>
---
 .../bindings/xrt/xlnx,xrt-group.yaml          | 59 +++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml

Comments

Rob Herring Nov. 18, 2021, 10:09 p.m. UTC | #1
On Thu, 18 Nov 2021 13:03:16 -0800, Lizhi Hou wrote:
> Create device tree binding document for xrt group device.
> 
> Signed-off-by: Sonal Santan <sonal.santan@xilinx.com>
> Signed-off-by: Max Zhen <max.zhen@xilinx.com>
> Signed-off-by: Lizhi Hou <lizhi.hou@xilinx.com>
> ---
>  .../bindings/xrt/xlnx,xrt-group.yaml          | 59 +++++++++++++++++++
>  1 file changed, 59 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:
./Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml:22:6: [warning] wrong indentation: expected 4 but found 5 (indentation)
./Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml:25:6: [warning] wrong indentation: expected 4 but found 5 (indentation)

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/xrt/xlnx,xrt-group.example.dt.yaml:0:0: /example-0/xrt-bus/xrt-group@48,0/ep_fpga_configuration_00@0,0,1e88000: failed to match any schema with compatible: ['xilinx.com,reg_abs-axi_hwicap-1.0', 'axi_hwicap']
Documentation/devicetree/bindings/xrt/xlnx,xrt-group.example.dt.yaml:0:0: /example-0/xrt-bus/xrt-group@48,0/ep_fpga_configuration_00@0,0,1e88000: failed to match any schema with compatible: ['xilinx.com,reg_abs-axi_hwicap-1.0', 'axi_hwicap']

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1556809

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.
Lizhi Hou Nov. 19, 2021, 1:06 a.m. UTC | #2
I was able to reproduce the error after following the instructions. I 
will include the fix with next version of this patch set.

Thanks,

Lizhi

On 11/18/21 2:09 PM, Rob Herring wrote
>
> On Thu, 18 Nov 2021 13:03:16 -0800, Lizhi Hou wrote:
>> Create device tree binding document for xrt group device.
>>
>> Signed-off-by: Sonal Santan <sonal.santan@xilinx.com>
>> Signed-off-by: Max Zhen <max.zhen@xilinx.com>
>> Signed-off-by: Lizhi Hou <lizhi.hou@xilinx.com>
>> ---
>>   .../bindings/xrt/xlnx,xrt-group.yaml          | 59 +++++++++++++++++++
>>   1 file changed, 59 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml
>>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml:22:6: [warning] wrong indentation: expected 4 but found 5 (indentation)
> ./Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml:25:6: [warning] wrong indentation: expected 4 but found 5 (indentation)
>
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/xrt/xlnx,xrt-group.example.dt.yaml:0:0: /example-0/xrt-bus/xrt-group@48,0/ep_fpga_configuration_00@0,0,1e88000: failed to match any schema with compatible: ['xilinx.com,reg_abs-axi_hwicap-1.0', 'axi_hwicap']
> Documentation/devicetree/bindings/xrt/xlnx,xrt-group.example.dt.yaml:0:0: /example-0/xrt-bus/xrt-group@48,0/ep_fpga_configuration_00@0,0,1e88000: failed to match any schema with compatible: ['xilinx.com,reg_abs-axi_hwicap-1.0', 'axi_hwicap']
>
> doc reference errors (make refcheckdocs):
>
> See https://patchwork.ozlabs.org/patch/1556809
>
> This check can fail if there are any dependencies. The base for a patch
> series is generally the most recent rc1.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit.
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml b/Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml
new file mode 100644
index 000000000000..112c493eb2d2
--- /dev/null
+++ b/Documentation/devicetree/bindings/xrt/xlnx,xrt-group.yaml
@@ -0,0 +1,59 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/xrt/xlnx,xrt-group.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx XRT group for Alveo platforms
+
+description: |
+  The xrt group is a pseudo device which is used to manage and
+  support xrt devices in the same Alveo partition. It is part
+  of XRT infrastructure.
+
+maintainers:
+  - Lizhi Hou <lizhi.hou@xilinx.com>
+
+properties:
+  compatible:
+    const: xlnx,xrt-group
+
+  "#address-cells":
+     const: 3
+
+  "#size-cells":
+     const: 2
+
+  ranges: true
+
+patternProperties:
+  "^.*@[0-5],[0-9a-f]+,[0-9a-f]+$":
+    description: xrt devices belongs to this group
+    type: object
+
+required:
+  - compatible
+  - "#address-cells"
+  - "#size-cells"
+  - ranges
+
+additionalProperties: false
+
+examples:
+  - |
+    xrt-bus {
+        #address-cells = <2>;
+        #size-cells = <2>;
+        xrt-group@48,0 {
+            compatible = "xlnx,xrt-group";
+            #address-cells = <3>;
+            #size-cells = <2>;
+            ranges = <0 0 0 0 0xe0000000 0 0x2000000
+                      2 0 0 0 0xe4200000 0 0x40000>;
+            ep_fpga_configuration_00@0,0,1e88000 {
+                reg = <0 0 0x1e88000 0 0x8000>;
+                compatible = "xilinx.com,reg_abs-axi_hwicap-1.0",
+                             "axi_hwicap";
+            };
+        };
+    };