| Message ID | 20210819080040.31242-2-chiawei_wang@aspeedtech.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | arm: aspeed: Add eSPI support | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | fail | build log |
On Thu, 19 Aug 2021 16:00:36 +0800, Chia-Wei Wang wrote: > Add dt-bindings for Aspeed eSPI controller > > Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> > --- > .../devicetree/bindings/soc/aspeed/espi.yaml | 158 ++++++++++++++++++ > 1 file changed, 158 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/aspeed/espi.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Error: Documentation/devicetree/bindings/soc/aspeed/espi.example.dts:35.35-36 syntax error FATAL ERROR: Unable to parse input tree make[1]: *** [scripts/Makefile.lib:380: Documentation/devicetree/bindings/soc/aspeed/espi.example.dt.yaml] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1419: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1518493 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Thu, Aug 19, 2021 at 04:00:36PM +0800, Chia-Wei Wang wrote: > Add dt-bindings for Aspeed eSPI controller > > Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> > --- > .../devicetree/bindings/soc/aspeed/espi.yaml | 158 ++++++++++++++++++ > 1 file changed, 158 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/aspeed/espi.yaml > > diff --git a/Documentation/devicetree/bindings/soc/aspeed/espi.yaml b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml > new file mode 100644 > index 000000000000..fec3d37f3ffd > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml > @@ -0,0 +1,158 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# # Copyright (c) 2021 Aspeed Technology Inc. > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/soc/aspeed/espi.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Aspeed eSPI Controller > + > +maintainers: > + - Chia-Wei Wang <chiawei_wang@aspeedtech.com> > + - Ryan Chen <ryan_chen@aspeedtech.com> > + > +description: > + Aspeed eSPI controller implements a slave side eSPI endpoint device > + supporting the four eSPI channels, namely peripheral, virtual wire, > + out-of-band, and flash. > + > +properties: > + compatible: > + items: > + - enum: > + - aspeed,ast2500-espi > + - aspeed,ast2600-espi > + - const: simple-mfd > + - const: syscon Is this really 2 sub devices that could be used individually or in a different combination? If not, then I'd make all this 1 node. Rob
Hi Rob, > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: Saturday, August 21, 2021 4:02 AM > To: ChiaWei Wang <chiawei_wang@aspeedtech.com> > Cc: joel@jms.id.au; andrew@aj.id.au; linux-aspeed@lists.ozlabs.org; > openbmc@lists.ozlabs.org; devicetree@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Ryan Chen > <ryan_chen@aspeedtech.com> > Subject: Re: [PATCH v2 1/5] dt-bindings: aspeed: Add eSPI controller > > On Thu, Aug 19, 2021 at 04:00:36PM +0800, Chia-Wei Wang wrote: > > Add dt-bindings for Aspeed eSPI controller > > > > Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> > > --- > > .../devicetree/bindings/soc/aspeed/espi.yaml | 158 > > ++++++++++++++++++ > > 1 file changed, 158 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/soc/aspeed/espi.yaml > > > > diff --git a/Documentation/devicetree/bindings/soc/aspeed/espi.yaml > > b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml > > new file mode 100644 > > index 000000000000..fec3d37f3ffd > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml > > @@ -0,0 +1,158 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # # > > +Copyright (c) 2021 Aspeed Technology Inc. > > +%YAML 1.2 > > +--- > > +$id: "http://devicetree.org/schemas/soc/aspeed/espi.yaml#" > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > > + > > +title: Aspeed eSPI Controller > > + > > +maintainers: > > + - Chia-Wei Wang <chiawei_wang@aspeedtech.com> > > + - Ryan Chen <ryan_chen@aspeedtech.com> > > + > > +description: > > + Aspeed eSPI controller implements a slave side eSPI endpoint device > > + supporting the four eSPI channels, namely peripheral, virtual wire, > > + out-of-band, and flash. > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - aspeed,ast2500-espi > > + - aspeed,ast2600-espi > > + - const: simple-mfd > > + - const: syscon > > Is this really 2 sub devices that could be used individually or in a different > combination? If not, then I'd make all this 1 node. espi-mmbi has individual function and control registers. However, espi-mmbi is also a feature extended based on the memory cycle of eSPI peripheral channel. Thereby, it has dependency on the eSPI channel initialization conducted by espi-ctrl. The scenario is similar to the lpc-ctrl and other lpc-xxx drivers of Aspeed SoCs. Chiawei
diff --git a/Documentation/devicetree/bindings/soc/aspeed/espi.yaml b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml new file mode 100644 index 000000000000..fec3d37f3ffd --- /dev/null +++ b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml @@ -0,0 +1,158 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# # Copyright (c) 2021 Aspeed Technology Inc. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/aspeed/espi.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Aspeed eSPI Controller + +maintainers: + - Chia-Wei Wang <chiawei_wang@aspeedtech.com> + - Ryan Chen <ryan_chen@aspeedtech.com> + +description: + Aspeed eSPI controller implements a slave side eSPI endpoint device + supporting the four eSPI channels, namely peripheral, virtual wire, + out-of-band, and flash. + +properties: + compatible: + items: + - enum: + - aspeed,ast2500-espi + - aspeed,ast2600-espi + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + + espi-ctrl: + type: object + + properties: + compatible: + items: + - enum: + - aspeed,ast2500-espi-ctrl + - aspeed,ast2600-espi-ctrl + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + perif,memcyc-enable: + type: boolean + description: Enable memory cycle over eSPI peripheral channel + + perif,memcyc-src-addr: + $ref: "/schemas/types.yaml#/definitions/uint32" + description: The Host side address to be decoded into the memory cycle over eSPI peripheral channel + + perif,memcyc-size: + $ref: "/schemas/types.yaml#/definitions/uint32" + description: The size of the memory region allocated for the memory cycle over eSPI peripheral channel + minimum: 65536 + + perif,dma-mode: + type: boolean + description: Enable DMA support for eSPI peripheral channel + + oob,dma-mode: + type: boolean + description: Enable DMA support for eSPI out-of-band channel + + oob,dma-tx-desc-num: + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 2 + maximum: 1023 + description: The number of TX descriptors available for eSPI OOB DMA engine + + oob,dma-rx-desc-num: + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 2 + maximum: 1023 + description: The number of RX descriptors available for eSPI OOB DMA engine + + flash,dma-mode: + type: boolean + description: Enable DMA support for eSPI flash channel + + flash,safs-mode: + $ref: "/schemas/types.yaml#/definitions/uint32" + enum: [ 0, 1, 2 ] + default: 0 + description: Slave-Attached-Sharing-Flash mode, 0->Mix, 1->SW, 2->HW + + dependencies: + perif,memcyc-src-addr: [ perif,memcyc-enable ] + perif,memcyc-size: [ perif,memcyc-enable ] + oob,dma-tx-desc-num: [ oob,dma-mode ] + oob,dma-rx-desc-num: [ oob,dma-mode ] + + required: + - compatible + - interrupts + - clocks + + espi-mmbi: + type: object + + properties: + compatible: + const: aspeed, ast2600-espi-mmbi + + interrupts: + maxItems: 1 + + required: + - compatible + - interrupts + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/ast2600-clock.h> + + espi: espi@1e6ee000 { + compatible = "aspeed,ast2600-espi", "simple-mfd", "syscon"; + reg = <0x1e6ee000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e6ee000 0x1000>; + + espi_ctrl: espi-ctrl@0 { + compatible = "aspeed,ast2600-espi-ctrl"; + reg = <0x0 0x800>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_ESPICLK>; + resets = <&syscon ASPEED_RESET_ESPI>; + }; + + espi_mmbi: espi-flash-channel@800 { + compatible = "aspeed,ast2600-espi-flash"; + reg = <0x800 0x50>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + }; + };
Add dt-bindings for Aspeed eSPI controller Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> --- .../devicetree/bindings/soc/aspeed/espi.yaml | 158 ++++++++++++++++++ 1 file changed, 158 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/aspeed/espi.yaml