| Message ID | 20201201223511.65542-5-mgross@linux.intel.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | None | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | fail | build log |
On Tue, 01 Dec 2020 14:34:53 -0800, mgross@linux.intel.com wrote: > From: Paul Murphy <paul.j.murphy@intel.com> > > Add DT bindings documentation for the Keem Bay VPU IPC driver. > > Cc: devicetree@vger.kernel.org > Reviewed-by: Mark Gross <mgross@linux.intel.com> > Signed-off-by: Paul Murphy <paul.j.murphy@intel.com> > Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com> > Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com> > --- > .../soc/intel/intel,keembay-vpu-ipc.yaml | 151 ++++++++++++++++++ > 1 file changed, 151 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: ./Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml:21:9: [warning] wrong indentation: expected 10 but found 8 (indentation) dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml: 'additionalProperties' is a required property /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml: ignoring, error in schema: warning: no schema found in file: ./Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml See https://patchwork.ozlabs.org/patch/1409183 The base for the patch is generally the last rc1. Any dependencies should be noted. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Mon, Dec 07, 2020 at 09:57:26AM -0600, Rob Herring wrote: > On Tue, 01 Dec 2020 14:34:53 -0800, mgross@linux.intel.com wrote: > > From: Paul Murphy <paul.j.murphy@intel.com> > > > > Add DT bindings documentation for the Keem Bay VPU IPC driver. > > > > Cc: devicetree@vger.kernel.org > > Reviewed-by: Mark Gross <mgross@linux.intel.com> > > Signed-off-by: Paul Murphy <paul.j.murphy@intel.com> > > Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com> > > Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com> > > --- > > .../soc/intel/intel,keembay-vpu-ipc.yaml | 151 ++++++++++++++++++ > > 1 file changed, 151 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml > > > > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > ./Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml:21:9: [warning] wrong indentation: expected 10 but found 8 (indentation) > > dtschema/dtc warnings/errors: > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml: 'additionalProperties' is a required property > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml: ignoring, error in schema: > warning: no schema found in file: ./Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml > > > See https://patchwork.ozlabs.org/patch/1409183 > > The base for the patch is generally the last rc1. Any dependencies > should be noted. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. Thanks! I will fix on the next update. --mark
diff --git a/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml b/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml new file mode 100644 index 000000000000..60d4a028563c --- /dev/null +++ b/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml @@ -0,0 +1,151 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (c) Intel Corporation. All rights reserved. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/intel/intel,keembay-vpu-ipc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Intel Keem Bay VPU IPC + +maintainers: + - Paul Murphy <paul.j.murphy@intel.com> + +description: + The VPU IPC driver facilitates loading of firmware, control, and communication + with the VPU over the IPC FIFO in the Intel Keem Bay SoC. + +properties: + compatible: + oneOf: + - items: + - const: intel,keembay-vpu-ipc + + reg: + items: + - description: NCE WDT registers + - description: NCE TIM_GEN_CONFIG registers + - description: MSS WDT registers + - description: MSS TIM_GEN_CONFIG registers + + reg-names: + items: + - const: nce_wdt + - const: nce_tim_cfg + - const: mss_wdt + - const: mss_tim_cfg + + memory-region: + items: + - description: reference to the VPU reserved memory region + - description: reference to the X509 reserved memory region + - description: reference to the MSS IPC area + + clocks: + items: + - description: cpu clock + - description: pll 0 out 0 rate + - description: pll 0 out 1 rate + - description: pll 0 out 2 rate + - description: pll 0 out 3 rate + - description: pll 1 out 0 rate + - description: pll 1 out 1 rate + - description: pll 1 out 2 rate + - description: pll 1 out 3 rate + - description: pll 2 out 0 rate + - description: pll 2 out 1 rate + - description: pll 2 out 2 rate + - description: pll 2 out 3 rate + + clocks-names: + items: + - const: cpu_clock + - const: pll_0_out_0 + - const: pll_0_out_1 + - const: pll_0_out_2 + - const: pll_0_out_3 + - const: pll_1_out_0 + - const: pll_1_out_1 + - const: pll_1_out_2 + - const: pll_1_out_3 + - const: pll_2_out_0 + - const: pll_2_out_1 + - const: pll_2_out_2 + - const: pll_2_out_3 + + interrupts: + items: + - description: number of NCE sub-system WDT timeout IRQ + - description: number of MSS sub-system WDT timeout IRQ + + interrupt-names: + items: + - const: nce_wdt + - const: mss_wdt + + intel,keembay-vpu-ipc-nce-wdt-redirect: + $ref: "/schemas/types.yaml#/definitions/uint32" + description: + Number to which we will request that the NCE sub-system + re-directs it's WDT timeout IRQ + + intel,keembay-vpu-ipc-mss-wdt-redirect: + $ref: "/schemas/types.yaml#/definitions/uint32" + description: + Number to which we will request that the MSS sub-system + re-directs it's WDT timeout IRQ + + intel,keembay-vpu-ipc-imr: + $ref: "/schemas/types.yaml#/definitions/uint32" + description: + IMR (isolated memory region) number which we will request + the runtime service uses to protect the VPU memory region + before authentication + + intel,keembay-vpu-ipc-id: + $ref: "/schemas/types.yaml#/definitions/uint32" + description: The VPU ID to be passed to the VPU firmware. + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + vpu-ipc@3f00209c { + compatible = "intel,keembay-vpu-ipc"; + reg = <0x3f00209c 0x10>, + <0x3f003008 0x4>, + <0x2082009c 0x10>, + <0x20821008 0x4>; + reg-names = "nce_wdt", + "nce_tim_cfg", + "mss_wdt", + "mss_tim_cfg"; + memory-region = <&vpu_reserved>, + <&vpu_x509_reserved>, + <&mss_ipc_reserved>; + clocks = <&scmi_clk 0>, + <&scmi_clk 0>, + <&scmi_clk 1>, + <&scmi_clk 2>, + <&scmi_clk 3>, + <&scmi_clk 4>, + <&scmi_clk 5>, + <&scmi_clk 6>, + <&scmi_clk 7>, + <&scmi_clk 8>, + <&scmi_clk 9>, + <&scmi_clk 10>, + <&scmi_clk 11>; + clock-names = "cpu_clock", + "pll_0_out_0", "pll_0_out_1", + "pll_0_out_2", "pll_0_out_3", + "pll_1_out_0", "pll_1_out_1", + "pll_1_out_2", "pll_1_out_3", + "pll_2_out_0", "pll_2_out_1", + "pll_2_out_2", "pll_2_out_3"; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "nce_wdt", "mss_wdt"; + intel,keembay-vpu-ipc-nce-wdt-redirect = <63>; + intel,keembay-vpu-ipc-mss-wdt-redirect = <47>; + intel,keembay-vpu-ipc-imr = <9>; + intel,keembay-vpu-ipc-id = <0>; + };