[v2] PCI: qcom: Fix the fixup of PCI_VENDOR_ID_QCOM
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Message ID 20191227012717.78965-1-bjorn.andersson@linaro.org
State New
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Series
  • [v2] PCI: qcom: Fix the fixup of PCI_VENDOR_ID_QCOM
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Commit Message

Bjorn Andersson Dec. 27, 2019, 1:27 a.m. UTC
There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
the fixup to only affect the relevant PCIe bridges.

Cc: stable@vger.kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---

Stan, I picked up all the suggested device id's from the previous thread and
added 0x1000 for QCS404. I looked at creating platform specific defines in
pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
prefer that I do this anyway.

 drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

Stanimir Varbanov Dec. 27, 2019, 8:51 a.m. UTC | #1
Hi Bjorn,

On 12/27/19 3:27 AM, Bjorn Andersson wrote:
> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
> the fixup to only affect the relevant PCIe bridges.
> 
> Cc: stable@vger.kernel.org
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
> 
> Stan, I picked up all the suggested device id's from the previous thread and
> added 0x1000 for QCS404. I looked at creating platform specific defines in
> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
> prefer that I do this anyway.

Looks good,

Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>

> 
>  drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 5ea527a6bd9f..138e1a2d21cc 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
>  {
>  	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
>  }
> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
>  
>  static struct platform_driver qcom_pcie_driver = {
>  	.probe = qcom_pcie_probe,
>
Marc Gonzalez Dec. 28, 2019, 3:41 p.m. UTC | #2
On 27/12/2019 09:51, Stanimir Varbanov wrote:

> On 12/27/19 3:27 AM, Bjorn Andersson wrote:
>
>> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
>> the fixup to only affect the relevant PCIe bridges.
>>
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>> ---
>>
>> Stan, I picked up all the suggested device id's from the previous thread and
>> added 0x1000 for QCS404. I looked at creating platform specific defines in
>> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
>> prefer that I do this anyway.
> 
> Looks good,
> 
> Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> 
>>  drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
>>  1 file changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 5ea527a6bd9f..138e1a2d21cc 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
>>  {
>>  	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
>>  }
>> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);

Hrmmm... still not CCed on the patch, and still don't think the
fixup is required(?) for 0x106 and 0x107.

Regards.
Bjorn Andersson Dec. 29, 2019, 2:45 a.m. UTC | #3
On Sat 28 Dec 07:41 PST 2019, Marc Gonzalez wrote:

> On 27/12/2019 09:51, Stanimir Varbanov wrote:
> 
> > On 12/27/19 3:27 AM, Bjorn Andersson wrote:
> >
> >> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
> >> the fixup to only affect the relevant PCIe bridges.
> >>
> >> Cc: stable@vger.kernel.org
> >> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> >> ---
> >>
> >> Stan, I picked up all the suggested device id's from the previous thread and
> >> added 0x1000 for QCS404. I looked at creating platform specific defines in
> >> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
> >> prefer that I do this anyway.
> > 
> > Looks good,
> > 
> > Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> > 
> >>  drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
> >>  1 file changed, 7 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> >> index 5ea527a6bd9f..138e1a2d21cc 100644
> >> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> >> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> >> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
> >>  {
> >>  	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
> >>  }
> >> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
> 
> Hrmmm... still not CCed on the patch,

You are Cc'ed on the patch, but as usual your mail server responds "451
too many errors from your ip" and throw my emails away.

> and still don't think the fixup is required(?) for 0x106 and 0x107.
> 

I re-read your reply in my v1 thread. So we know that 0x104 doesn't need
the fixup, so resumably only 0x101 needs the fixup?

Regards,
Bjorn
Marc Gonzalez Dec. 30, 2019, 8:25 p.m. UTC | #4
On 29/12/2019 03:45, Bjorn Andersson wrote:

> On Sat 28 Dec 07:41 PST 2019, Marc Gonzalez wrote:
> 
>> On 27/12/2019 09:51, Stanimir Varbanov wrote:
>>
>>> On 12/27/19 3:27 AM, Bjorn Andersson wrote:
>>>
>>>> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
>>>> the fixup to only affect the relevant PCIe bridges.
>>>>
>>>> Cc: stable@vger.kernel.org
>>>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>>>> ---
>>>>
>>>> Stan, I picked up all the suggested device id's from the previous thread and
>>>> added 0x1000 for QCS404. I looked at creating platform specific defines in
>>>> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
>>>> prefer that I do this anyway.
>>>
>>> Looks good,
>>>
>>> Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
>>>
>>>>  drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
>>>>  1 file changed, 7 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>>>> index 5ea527a6bd9f..138e1a2d21cc 100644
>>>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>>>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>>>> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
>>>>  {
>>>>  	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
>>>>  }
>>>> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
>>
>> Hrmmm... still not CCed on the patch,
> 
> You are Cc'ed on the patch, but as usual your mail server responds "451
> too many errors from your ip" and throw my emails away.
> 
>> and still don't think the fixup is required(?) for 0x106 and 0x107.
>>
> 
> I re-read your reply in my v1 thread. So we know that 0x104 doesn't need
> the fixup, so presumably only 0x101 needs the fixup?

I apologize for the tone of my reply. I did not mean to sound
so snarky.

All I can say is that, if I remember correctly, the fixup was
not necessary on apq8098 (0x0105) and it was probably not
required on msm8996 and sdm845. For older platforms, all bets
are off.

Regards.
Lorenzo Pieralisi Feb. 21, 2020, 2:35 p.m. UTC | #5
On Mon, Dec 30, 2019 at 09:25:28PM +0100, Marc Gonzalez wrote:
> On 29/12/2019 03:45, Bjorn Andersson wrote:
> 
> > On Sat 28 Dec 07:41 PST 2019, Marc Gonzalez wrote:
> > 
> >> On 27/12/2019 09:51, Stanimir Varbanov wrote:
> >>
> >>> On 12/27/19 3:27 AM, Bjorn Andersson wrote:
> >>>
> >>>> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
> >>>> the fixup to only affect the relevant PCIe bridges.
> >>>>
> >>>> Cc: stable@vger.kernel.org
> >>>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> >>>> ---
> >>>>
> >>>> Stan, I picked up all the suggested device id's from the previous thread and
> >>>> added 0x1000 for QCS404. I looked at creating platform specific defines in
> >>>> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
> >>>> prefer that I do this anyway.
> >>>
> >>> Looks good,
> >>>
> >>> Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> >>>
> >>>>  drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
> >>>>  1 file changed, 7 insertions(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> >>>> index 5ea527a6bd9f..138e1a2d21cc 100644
> >>>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> >>>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> >>>> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
> >>>>  {
> >>>>  	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
> >>>>  }
> >>>> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
> >>
> >> Hrmmm... still not CCed on the patch,
> > 
> > You are Cc'ed on the patch, but as usual your mail server responds "451
> > too many errors from your ip" and throw my emails away.
> > 
> >> and still don't think the fixup is required(?) for 0x106 and 0x107.
> >>
> > 
> > I re-read your reply in my v1 thread. So we know that 0x104 doesn't need
> > the fixup, so presumably only 0x101 needs the fixup?
> 
> I apologize for the tone of my reply. I did not mean to sound
> so snarky.
> 
> All I can say is that, if I remember correctly, the fixup was
> not necessary on apq8098 (0x0105) and it was probably not
> required on msm8996 and sdm845. For older platforms, all bets
> are off.

How are we proceeding with this patch then ?

Thanks,
Lorenzo
Stanimir Varbanov Feb. 26, 2020, 9:27 a.m. UTC | #6
Hi Lorenzo,

On 2/21/20 4:35 PM, Lorenzo Pieralisi wrote:
> On Mon, Dec 30, 2019 at 09:25:28PM +0100, Marc Gonzalez wrote:
>> On 29/12/2019 03:45, Bjorn Andersson wrote:
>>
>>> On Sat 28 Dec 07:41 PST 2019, Marc Gonzalez wrote:
>>>
>>>> On 27/12/2019 09:51, Stanimir Varbanov wrote:
>>>>
>>>>> On 12/27/19 3:27 AM, Bjorn Andersson wrote:
>>>>>
>>>>>> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
>>>>>> the fixup to only affect the relevant PCIe bridges.
>>>>>>
>>>>>> Cc: stable@vger.kernel.org
>>>>>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>>>>>> ---
>>>>>>
>>>>>> Stan, I picked up all the suggested device id's from the previous thread and
>>>>>> added 0x1000 for QCS404. I looked at creating platform specific defines in
>>>>>> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
>>>>>> prefer that I do this anyway.
>>>>>
>>>>> Looks good,
>>>>>
>>>>> Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
>>>>>
>>>>>>  drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
>>>>>>  1 file changed, 7 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>>>>>> index 5ea527a6bd9f..138e1a2d21cc 100644
>>>>>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>>>>>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>>>>>> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
>>>>>>  {
>>>>>>  	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
>>>>>>  }
>>>>>> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
>>>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
>>>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
>>>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
>>>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
>>>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
>>>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
>>>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
>>>>
>>>> Hrmmm... still not CCed on the patch,
>>>
>>> You are Cc'ed on the patch, but as usual your mail server responds "451
>>> too many errors from your ip" and throw my emails away.
>>>
>>>> and still don't think the fixup is required(?) for 0x106 and 0x107.
>>>>
>>>
>>> I re-read your reply in my v1 thread. So we know that 0x104 doesn't need
>>> the fixup, so presumably only 0x101 needs the fixup?
>>
>> I apologize for the tone of my reply. I did not mean to sound
>> so snarky.
>>
>> All I can say is that, if I remember correctly, the fixup was
>> not necessary on apq8098 (0x0105) and it was probably not
>> required on msm8996 and sdm845. For older platforms, all bets
>> are off.
> 
> How are we proceeding with this patch then ?

It took too much time, please take it as-is in v2 with my Ack.

We can drop the not-affected SoCs with follow-up patches once we are
sure that we do not break the supported SoCs.
Lorenzo Pieralisi Feb. 26, 2020, 10:22 a.m. UTC | #7
On Thu, Dec 26, 2019 at 05:27:17PM -0800, Bjorn Andersson wrote:
> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
> the fixup to only affect the relevant PCIe bridges.
> 
> Cc: stable@vger.kernel.org

Hi Bjorn,

to simplify stable's merging, would you mind helping me with
the stable releases you want this patch to apply to please ?

I will apply it then.

Thanks,
Lorenzo

> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
> 
> Stan, I picked up all the suggested device id's from the previous thread and
> added 0x1000 for QCS404. I looked at creating platform specific defines in
> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
> prefer that I do this anyway.
> 
>  drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 5ea527a6bd9f..138e1a2d21cc 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
>  {
>  	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
>  }
> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
>  
>  static struct platform_driver qcom_pcie_driver = {
>  	.probe = qcom_pcie_probe,
> -- 
> 2.24.0
>
Stanimir Varbanov Feb. 26, 2020, 10:56 a.m. UTC | #8
Hi Lorenzo,

On 2/26/20 12:22 PM, Lorenzo Pieralisi wrote:
> On Thu, Dec 26, 2019 at 05:27:17PM -0800, Bjorn Andersson wrote:
>> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
>> the fixup to only affect the relevant PCIe bridges.
>>
>> Cc: stable@vger.kernel.org
> 
> Hi Bjorn,
> 
> to simplify stable's merging, would you mind helping me with
> the stable releases you want this patch to apply to please ?
> 

We've to have this in the patch:

Cc: stable@vger.kernel.org # v5.2+
Fixes: 322f03436692 ("PCI: qcom: Use default config space read function")

> I will apply it then.
> 
> Thanks,
> Lorenzo
> 
>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>> ---
>>
>> Stan, I picked up all the suggested device id's from the previous thread and
>> added 0x1000 for QCS404. I looked at creating platform specific defines in
>> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
>> prefer that I do this anyway.
>>
>>  drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
>>  1 file changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 5ea527a6bd9f..138e1a2d21cc 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
>>  {
>>  	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
>>  }
>> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
>>  
>>  static struct platform_driver qcom_pcie_driver = {
>>  	.probe = qcom_pcie_probe,
>> -- 
>> 2.24.0
>>
Lorenzo Pieralisi Feb. 26, 2020, 11:05 a.m. UTC | #9
On Wed, Feb 26, 2020 at 12:56:23PM +0200, Stanimir Varbanov wrote:
> Hi Lorenzo,
> 
> On 2/26/20 12:22 PM, Lorenzo Pieralisi wrote:
> > On Thu, Dec 26, 2019 at 05:27:17PM -0800, Bjorn Andersson wrote:
> >> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
> >> the fixup to only affect the relevant PCIe bridges.
> >>
> >> Cc: stable@vger.kernel.org
> > 
> > Hi Bjorn,
> > 
> > to simplify stable's merging, would you mind helping me with
> > the stable releases you want this patch to apply to please ?
> > 
> 
> We've to have this in the patch:
> 
> Cc: stable@vger.kernel.org # v5.2+
> Fixes: 322f03436692 ("PCI: qcom: Use default config space read function")

Done, applied to pci/qcom for v5.7.

Thanks,
Lorenzo

> > I will apply it then.
> > 
> > Thanks,
> > Lorenzo
> > 
> >> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> >> ---
> >>
> >> Stan, I picked up all the suggested device id's from the previous thread and
> >> added 0x1000 for QCS404. I looked at creating platform specific defines in
> >> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
> >> prefer that I do this anyway.
> >>
> >>  drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
> >>  1 file changed, 7 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> >> index 5ea527a6bd9f..138e1a2d21cc 100644
> >> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> >> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> >> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
> >>  {
> >>  	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
> >>  }
> >> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
> >>  
> >>  static struct platform_driver qcom_pcie_driver = {
> >>  	.probe = qcom_pcie_probe,
> >> -- 
> >> 2.24.0
> >>
> 
> -- 
> regards,
> Stan

Patch
diff mbox series

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 5ea527a6bd9f..138e1a2d21cc 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1439,7 +1439,13 @@  static void qcom_fixup_class(struct pci_dev *dev)
 {
 	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
 }
-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
 
 static struct platform_driver qcom_pcie_driver = {
 	.probe = qcom_pcie_probe,