| Message ID | 20191204174439.69934-4-giulio.benetti@benettiengineering.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Stefano Babic |
| Headers | show |
| Series | Add i.MXRT family support | expand |
On Wed, 4 Dec 2019 18:44:22 +0100 Giulio Benetti <giulio.benetti@benettiengineering.com> wrote: > Better to register the 2 clock as 2 different drivers because they > work slightly differently depending on power_bit and powerup_set bits > coming on next patches. > > Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> > --- > drivers/clk/imx/clk-pllv3.c | 20 +++++++++++++++----- > 1 file changed, 15 insertions(+), 5 deletions(-) > > diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c > index fbb7b24d5e..d1e4c3fe30 100644 > --- a/drivers/clk/imx/clk-pllv3.c > +++ b/drivers/clk/imx/clk-pllv3.c > @@ -13,7 +13,8 @@ > #include <clk.h> > #include "clk.h" > > -#define UBOOT_DM_CLK_IMX_PLLV3 "imx_clk_pllv3" > +#define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic" > +#define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb" > > struct clk_pllv3 { > struct clk clk; > @@ -24,7 +25,7 @@ struct clk_pllv3 { > > #define to_clk_pllv3(_clk) container_of(_clk, struct clk_pllv3, clk) > > -static ulong clk_pllv3_get_rate(struct clk *clk) > +static ulong clk_pllv3_generic_get_rate(struct clk *clk) > { > struct clk_pllv3 *pll = > to_clk_pllv3(dev_get_clk_ptr(clk->dev)); unsigned long parent_rate = > clk_get_parent_rate(clk); @@ -35,7 +36,7 @@ static ulong > clk_pllv3_get_rate(struct clk *clk) } > > static const struct clk_ops clk_pllv3_generic_ops = { > - .get_rate = clk_pllv3_get_rate, > + .get_rate = clk_pllv3_generic_get_rate, > }; > > struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, > @@ -53,8 +54,10 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type > type, const char *name, > switch (type) { > case IMX_PLLV3_GENERIC: > + drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC; > + break; > case IMX_PLLV3_USB: > - drv_name = UBOOT_DM_CLK_IMX_PLLV3; > + drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB; > break; > default: > kfree(pll); > @@ -75,7 +78,14 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type > type, const char *name, } > > U_BOOT_DRIVER(clk_pllv3_generic) = { > - .name = UBOOT_DM_CLK_IMX_PLLV3, > + .name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC, > + .id = UCLASS_CLK, > + .ops = &clk_pllv3_generic_ops, > + .flags = DM_FLAG_PRE_RELOC, > +}; > + > +U_BOOT_DRIVER(clk_pllv3_usb) = { > + .name = UBOOT_DM_CLK_IMX_PLLV3_USB, > .id = UCLASS_CLK, > .ops = &clk_pllv3_generic_ops, > .flags = DM_FLAG_PRE_RELOC, Reviewed-by: Lukasz Majewski <lukma@denx.de> Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c index fbb7b24d5e..d1e4c3fe30 100644 --- a/drivers/clk/imx/clk-pllv3.c +++ b/drivers/clk/imx/clk-pllv3.c @@ -13,7 +13,8 @@ #include <clk.h> #include "clk.h" -#define UBOOT_DM_CLK_IMX_PLLV3 "imx_clk_pllv3" +#define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic" +#define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb" struct clk_pllv3 { struct clk clk; @@ -24,7 +25,7 @@ struct clk_pllv3 { #define to_clk_pllv3(_clk) container_of(_clk, struct clk_pllv3, clk) -static ulong clk_pllv3_get_rate(struct clk *clk) +static ulong clk_pllv3_generic_get_rate(struct clk *clk) { struct clk_pllv3 *pll = to_clk_pllv3(dev_get_clk_ptr(clk->dev)); unsigned long parent_rate = clk_get_parent_rate(clk); @@ -35,7 +36,7 @@ static ulong clk_pllv3_get_rate(struct clk *clk) } static const struct clk_ops clk_pllv3_generic_ops = { - .get_rate = clk_pllv3_get_rate, + .get_rate = clk_pllv3_generic_get_rate, }; struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, @@ -53,8 +54,10 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, switch (type) { case IMX_PLLV3_GENERIC: + drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC; + break; case IMX_PLLV3_USB: - drv_name = UBOOT_DM_CLK_IMX_PLLV3; + drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB; break; default: kfree(pll); @@ -75,7 +78,14 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, } U_BOOT_DRIVER(clk_pllv3_generic) = { - .name = UBOOT_DM_CLK_IMX_PLLV3, + .name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC, + .id = UCLASS_CLK, + .ops = &clk_pllv3_generic_ops, + .flags = DM_FLAG_PRE_RELOC, +}; + +U_BOOT_DRIVER(clk_pllv3_usb) = { + .name = UBOOT_DM_CLK_IMX_PLLV3_USB, .id = UCLASS_CLK, .ops = &clk_pllv3_generic_ops, .flags = DM_FLAG_PRE_RELOC,
Better to register the 2 clock as 2 different drivers because they work slightly differently depending on power_bit and powerup_set bits coming on next patches. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> --- drivers/clk/imx/clk-pllv3.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-)