| Message ID | 20191122103041.4234-1-i.maximets@ovn.org |
|---|---|
| State | Rejected |
| Delegated to: | Ilya Maximets |
| Headers | show |
| Series | [ovs-dev] acinclude.m4: Define ARM vector instructions for cgcc. | expand |
On 22.11.2019 11:30, Ilya Maximets wrote: > We need to define __ARM_NEON, __ARM_NEON__ or __ARM_FEATURE_SIMD32 > depending on the compiler and its version in order to make sparse happy > while checking DPDK headers on ARM. This also will allow us to check > same vectorized code that we're building. > > Reported-by: Lance Yang <Lance.Yang@arm.com> > Signed-off-by: Ilya Maximets <i.maximets@ovn.org> > --- It turned out this doesn't really work with GCC, because NEON vector types are GCC built-in types and sparse doesn't have support for them. More details here: https://mail.openvswitch.org/pipermail/ovs-dev/2019-November/365165.html Best regards, Ilya Maximets.
diff --git a/acinclude.m4 b/acinclude.m4 index 542637ac8..40b842ae3 100644 --- a/acinclude.m4 +++ b/acinclude.m4 @@ -1256,7 +1256,7 @@ AC_DEFUN([OVS_CHECK_SPARSE_TARGET], dnl allow "sparse" correctly check the same code that will be built. dnl Required for checking DPDK headers. AC_MSG_CHECKING([vector options for cgcc]) - VECTOR=$($CC -dM -E - < /dev/null | grep -E "MMX|SSE|AVX" | \ + VECTOR=$($CC -dM -E - < /dev/null | grep -E "MMX|SSE|AVX|NEON|SIMD" | \ cut -c 9- | sed 's/ /=/' | sed 's/^/-D/' | tr '\n' ' ') AC_MSG_RESULT([$VECTOR]) CGCCFLAGS="$CGCCFLAGS $VECTOR"
We need to define __ARM_NEON, __ARM_NEON__ or __ARM_FEATURE_SIMD32 depending on the compiler and its version in order to make sparse happy while checking DPDK headers on ARM. This also will allow us to check same vectorized code that we're building. Reported-by: Lance Yang <Lance.Yang@arm.com> Signed-off-by: Ilya Maximets <i.maximets@ovn.org> --- I didn't really test that this fixes all the sparse issues on ARM, at least it should fix some of them. Lance, could you, please, check? acinclude.m4 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)