| Message ID | 20190817073253.27819-5-hch@lst.de |
|---|---|
| State | Not Applicable |
| Delegated to: | David Miller |
| Headers | show |
| Series | [01/26] mtd/maps/pxa2xx: use ioremap_cache insted of ioremap_cached | expand |
Hi Christoph, On Sat, Aug 17, 2019 at 09:32:31AM +0200, Christoph Hellwig wrote: > Just define ioremap_cache directly. > > Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Paul Burton <paul.burton@mips.com> Thanks, Paul > --- > arch/mips/include/asm/io.h | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h > index 97a280640daf..c02db986ddf5 100644 > --- a/arch/mips/include/asm/io.h > +++ b/arch/mips/include/asm/io.h > @@ -262,11 +262,11 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, > #define ioremap_uc ioremap_nocache > > /* > - * ioremap_cachable - map bus memory into CPU space > + * ioremap_cache - map bus memory into CPU space > * @offset: bus address of the memory > * @size: size of the resource to map > * > - * ioremap_nocache performs a platform specific sequence of operations to > + * ioremap_cache performs a platform specific sequence of operations to > * make bus memory CPU accessible via the readb/readw/readl/writeb/ > * writew/writel functions and the other mmio helpers. The returned > * address is not guaranteed to be usable directly as a virtual > @@ -276,9 +276,8 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, > * the CPU. Also enables full write-combining. Useful for some > * memory-like regions on I/O busses. > */ > -#define ioremap_cachable(offset, size) \ > +#define ioremap_cache(offset, size) \ > __ioremap_mode((offset), (size), _page_cachable_default) > -#define ioremap_cache ioremap_cachable > > /* > * ioremap_wc - map bus memory into CPU space > -- > 2.20.1 >
On Mon, Aug 19, 2019 at 08:57:30PM +0000, Paul Burton wrote: > Hi Christoph, > > On Sat, Aug 17, 2019 at 09:32:31AM +0200, Christoph Hellwig wrote: > > Just define ioremap_cache directly. > > > > Signed-off-by: Christoph Hellwig <hch@lst.de> > > Acked-by: Paul Burton <paul.burton@mips.com> Can you pick this patch up through the mips tree?
Hello, Christoph Hellwig wrote: > Just define ioremap_cache directly. Applied to mips-next. > commit 60af0d94cc37 > https://git.kernel.org/mips/c/60af0d94cc37 > > Signed-off-by: Christoph Hellwig <hch@lst.de> > Signed-off-by: Paul Burton <paul.burton@mips.com> Thanks, Paul [ This message was auto-generated; if you believe anything is incorrect then please email paul.burton@mips.com to report it. ]
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 97a280640daf..c02db986ddf5 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -262,11 +262,11 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, #define ioremap_uc ioremap_nocache /* - * ioremap_cachable - map bus memory into CPU space + * ioremap_cache - map bus memory into CPU space * @offset: bus address of the memory * @size: size of the resource to map * - * ioremap_nocache performs a platform specific sequence of operations to + * ioremap_cache performs a platform specific sequence of operations to * make bus memory CPU accessible via the readb/readw/readl/writeb/ * writew/writel functions and the other mmio helpers. The returned * address is not guaranteed to be usable directly as a virtual @@ -276,9 +276,8 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, * the CPU. Also enables full write-combining. Useful for some * memory-like regions on I/O busses. */ -#define ioremap_cachable(offset, size) \ +#define ioremap_cache(offset, size) \ __ioremap_mode((offset), (size), _page_cachable_default) -#define ioremap_cache ioremap_cachable /* * ioremap_wc - map bus memory into CPU space
Just define ioremap_cache directly. Signed-off-by: Christoph Hellwig <hch@lst.de> --- arch/mips/include/asm/io.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)