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[U-Boot,2/2] ARM: tegra: Remove disp1 clock initialization on Tegra210

Message ID 20190321171422.22817-2-thierry.reding@gmail.com
State Accepted
Delegated to: Tom Warren
Headers show
Series [U-Boot,1/2] ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210 | expand

Commit Message

Thierry Reding March 21, 2019, 5:14 p.m. UTC 
From: Thierry Reding <treding@nvidia.com>

pll_c is not a valid parent for the disp1 clock, so trying to set it
will fail. Given that display is not used in U-Boot, remove the init
table entry so that disp1 will keep its default parent (clk_m).

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm/mach-tegra/tegra210/clock.c | 1 -
 1 file changed, 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 0d7cafea2017..b240860f08cf 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1265,7 +1265,6 @@  struct periph_clk_init periph_clk_init_table[] = {
 	{ PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
 	{ PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
 	{ PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
-	{ PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
 	{ PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
 	{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
 	{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },