diff mbox series

[i386] : Fix PR88418, ICE in extract_insn

Message ID CAFULd4apiD8v7ZxrXkVUciGiFiXfzVZ-3Y+CCgYSc9yd231Zgg@mail.gmail.com
State New
Headers show
Series [i386] : Fix PR88418, ICE in extract_insn | expand

Commit Message

Uros Bizjak Dec. 10, 2018, 3:50 p.m. UTC 
Hello!

For vector modes we have to use vector_operand predicate, which
rejects unaligned operands for non-avx targets.

2018-12-10  Uros Bizjak  <ubizjak@gmail.com>

    PR target/88418
    * config/i386/i386.c (ix86_expand_sse_cmp): For vector modes,
    check operand 1 with vector_operand predicate.
    (ix86_expand_sse_movcc): For vector modes, check op_true with
    vector_operand, not nonimmediate_operand.

testsuite/ChangeLog:

2018-12-10  Uros Bizjak  <ubizjak@gmail.com>

    PR target/88418
    * gcc.target/i386/pr88418.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline, patch will be backported to release branches.

Uros.
diff mbox series

Patch

Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c	(revision 266926)
+++ config/i386/i386.c	(working copy)
@@ -23483,7 +23483,7 @@  ix86_expand_sse_fp_minmax (rtx dest, enum rtx_code
   return true;
 }
 
-/* Expand an sse vector comparison.  Return the register with the result.  */
+/* Expand an SSE comparison.  Return the register with the result.  */
 
 static rtx
 ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1,
@@ -23508,9 +23508,12 @@  ix86_expand_sse_cmp (rtx dest, enum rtx_code code,
   else
     cmp_mode = cmp_ops_mode;
 
+  cmp_op0 = force_reg (cmp_ops_mode, cmp_op0);
 
-  cmp_op0 = force_reg (cmp_ops_mode, cmp_op0);
-  if (!nonimmediate_operand (cmp_op1, cmp_ops_mode))
+  int (*op1_predicate)(rtx, machine_mode)
+    = VECTOR_MODE_P (cmp_ops_mode) ? vector_operand : nonimmediate_operand;
+
+  if (!op1_predicate (cmp_op1, cmp_ops_mode))
     cmp_op1 = force_reg (cmp_ops_mode, cmp_op1);
 
   if (optimize
@@ -23627,7 +23630,7 @@  ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_t
       rtx (*gen) (rtx, rtx, rtx, rtx) = NULL;
       rtx d = dest;
 
-      if (!nonimmediate_operand (op_true, mode))
+      if (!vector_operand (op_true, mode))
 	op_true = force_reg (mode, op_true);
 
       op_false = force_reg (mode, op_false);
Index: testsuite/gcc.target/i386/pr88418.c
===================================================================
--- testsuite/gcc.target/i386/pr88418.c	(nonexistent)
+++ testsuite/gcc.target/i386/pr88418.c	(working copy)
@@ -0,0 +1,15 @@ 
+/* PR target/88418 */
+/* { dg-do compile } */
+/* { dg-options "-O1 -fpack-struct -msse4.1" } */
+
+typedef long long v2di __attribute__ ((__vector_size__ (16)));
+
+union df {
+  v2di se[2];
+};
+
+void
+qg (union df *jz, union df *pl)
+{
+  jz->se[0] = jz->se[0] == pl->se[0];
+}