From patchwork Fri May 4 10:49:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ley Foon Tan X-Patchwork-Id: 908667 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=intel.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40cpg73kzRz9s27 for ; Fri, 4 May 2018 20:49:39 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 1EBC4C21F42; Fri, 4 May 2018 10:49:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 12F76C21EA8; Fri, 4 May 2018 10:49:30 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BD2B6C21EA8; Fri, 4 May 2018 10:49:28 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lists.denx.de (Postfix) with ESMTPS id D4C9FC21C57 for ; Fri, 4 May 2018 10:49:27 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 May 2018 03:49:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,362,1520924400"; d="scan'208";a="37410831" Received: from lftan-mobl.gar.corp.intel.com (HELO ubuntu) ([10.226.248.85]) by fmsmga008.fm.intel.com with SMTP; 04 May 2018 03:49:23 -0700 Received: by ubuntu (sSMTP sendmail emulation); Fri, 04 May 2018 18:49:22 +0800 From: Ley Foon Tan To: u-boot@lists.denx.de Date: Fri, 4 May 2018 18:49:18 +0800 Message-Id: <1525430961-45527-1-git-send-email-ley.foon.tan@intel.com> X-Mailer: git-send-email 2.7.4 Cc: Marek Vasut , Chin Liang See , Dinh Nguyen Subject: [U-Boot] [PATCH v2 0/3] drivers: Add reset ctrl to drivers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add reset ctrl to dwmmc socfpga, designware Ethernet and ns16550 serial drivers. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. This is preparation to upstream Intel Stratix 10 SoC support in [1]. v2 change: - remove 'return' in designware emac driver - keep reset control in socfpga_dw_mmc.c because it didn't call to common dwmmc probe function when in SPL. - add reviewed-by in ns16550 patch History: v1: https://patchwork.ozlabs.org/cover/905519/ [1]: https://patchwork.ozlabs.org/cover/900499/ Ley Foon Tan (3): mmc: dwmmc: socfpga: Add reset ctrl to driver serial: ns16550: Add reset ctrl to driver net: designware: Add reset ctrl to driver drivers/mmc/socfpga_dw_mmc.c | 19 +++++++++++++++++++ drivers/net/designware.c | 11 +++++++++++ drivers/serial/ns16550.c | 12 ++++++++++++ 3 files changed, 42 insertions(+), 0 deletions(-)