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[v4,00/13] mmc: mediatek: add support of mt2701/mt2712

Message ID 1507627831-29323-1-git-send-email-chaotian.jing@mediatek.com
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Series mmc: mediatek: add support of mt2701/mt2712 | expand

Message

Chaotian Jing (井朝天) Oct. 10, 2017, 9:30 a.m. UTC
This serial of patches are adding support of mt2701/mt2712.
there are many changes and HW improvement between mt8173 and
mt2701/mt2712, below is a list of these changes:
  1. enlarge CLKDIV bits from 8 to 12
  2. remove the PAD_TUNE register and add a new PAD_TUNE0 register
  3. add data sync and async fifo feature
  4. add busy_check feature
  5. add stop_clk fix
  6. add enhance_rx support
  7. add a seperate CG of source clock

  mt2712 supports full of these features, mt2701 supports part of it, and
add a "mediatek,latch-ck" to work-around as it do not support stop-clk fix.

Note: As Pinctrl/CCF are not ready now, so that current patches do not
include DTS part.

Changed vs v3:
  based on Ulf's comments, make the bindings change to be the first patch.

Changed vs v2:
  based on Matthias's comments, merge binding file changes to one patch,
add "hs400_tune" flag in dev_comp.

Changed vs v1:
  based on Ulf/Rob/Matthias's comments of DTS binding file, make the binding
file clearly and fix probe issue.


Chaotian Jing (12):
  mmc: dt-bindings: Add reg/source_cg/latch-ck for Mediatek MMC bindings
  mmc: mediatek: add support of mt2701/mt2712
  arm64: dts: mt8173: remove "mediatek,mt8135-mmc" from mmc nodes
  mmc: mediatek: make hs400_tune_response only for mt8173
  mmc: mediatek: add pad_tune0 support
  mmc: mediatek: add async fifo and data tune support
  mmc: mediatek: add busy_check support
  mmc: mediatek: add stop_clk fix and enhance_rx support
  mmc: mediatek: add support of source_cg clock
  mmc: mediatek: add latch-ck support
  mmc: mediatek: improve eMMC hs400 mode read performance
  mmc: mediatek: perfer to use rise edge latching for cmd line

 Documentation/devicetree/bindings/mmc/mtk-sd.txt |  16 +-
 arch/arm64/boot/dts/mediatek/mt8173.dtsi         |  12 +-
 drivers/mmc/host/mtk-sd.c                        | 301 ++++++++++++++++++++---
 3 files changed, 281 insertions(+), 48 deletions(-)

Comments

Ulf Hansson Oct. 10, 2017, 10:49 a.m. UTC | #1
On 10 October 2017 at 11:30, Chaotian Jing <chaotian.jing@mediatek.com> wrote:
> devicetree bindings has been updated to support multi-platforms,
> so that each platform has its owns compatible name.
> And, this compatible name may used in driver to distinguish with
> other platform.
>
> Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>

I assume there is no dependency to the rest or the series on this, so
this can go via arm soc?

Kind regards
Uffe

> ---
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index b99a273..26396ef 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -682,8 +682,7 @@
>                 };
>
>                 mmc0: mmc@11230000 {
> -                       compatible = "mediatek,mt8173-mmc",
> -                                    "mediatek,mt8135-mmc";
> +                       compatible = "mediatek,mt8173-mmc";
>                         reg = <0 0x11230000 0 0x1000>;
>                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_LOW>;
>                         clocks = <&pericfg CLK_PERI_MSDC30_0>,
> @@ -693,8 +692,7 @@
>                 };
>
>                 mmc1: mmc@11240000 {
> -                       compatible = "mediatek,mt8173-mmc",
> -                                    "mediatek,mt8135-mmc";
> +                       compatible = "mediatek,mt8173-mmc";
>                         reg = <0 0x11240000 0 0x1000>;
>                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
>                         clocks = <&pericfg CLK_PERI_MSDC30_1>,
> @@ -704,8 +702,7 @@
>                 };
>
>                 mmc2: mmc@11250000 {
> -                       compatible = "mediatek,mt8173-mmc",
> -                                    "mediatek,mt8135-mmc";
> +                       compatible = "mediatek,mt8173-mmc";
>                         reg = <0 0x11250000 0 0x1000>;
>                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
>                         clocks = <&pericfg CLK_PERI_MSDC30_2>,
> @@ -715,8 +712,7 @@
>                 };
>
>                 mmc3: mmc@11260000 {
> -                       compatible = "mediatek,mt8173-mmc",
> -                                    "mediatek,mt8135-mmc";
> +                       compatible = "mediatek,mt8173-mmc";
>                         reg = <0 0x11260000 0 0x1000>;
>                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_LOW>;
>                         clocks = <&pericfg CLK_PERI_MSDC30_3>,
> --
> 1.8.1.1.dirty
>
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Matthias Brugger Oct. 10, 2017, 11:06 a.m. UTC | #2
On 10/10/2017 12:49 PM, Ulf Hansson wrote:
> On 10 October 2017 at 11:30, Chaotian Jing <chaotian.jing@mediatek.com> wrote:
>> devicetree bindings has been updated to support multi-platforms,
>> so that each platform has its owns compatible name.
>> And, this compatible name may used in driver to distinguish with
>> other platform.
>>
>> Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
> 
> I assume there is no dependency to the rest or the series on this, so
> this can go via arm soc?
> 


Not in the sense of a merge conflict or something, but mt8173-mmc won't work 
until patch 2/12 is merged as well. If we want to be conservative, we should 
wait for this patch until the next kernel release. In the end it's just a 
cleanup of the dtsi.

Regards,
Matthias

> Kind regards
> Uffe
> 
>> ---
>>   arch/arm64/boot/dts/mediatek/mt8173.dtsi | 12 ++++--------
>>   1 file changed, 4 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
>> index b99a273..26396ef 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
>> @@ -682,8 +682,7 @@
>>                  };
>>
>>                  mmc0: mmc@11230000 {
>> -                       compatible = "mediatek,mt8173-mmc",
>> -                                    "mediatek,mt8135-mmc";
>> +                       compatible = "mediatek,mt8173-mmc";
>>                          reg = <0 0x11230000 0 0x1000>;
>>                          interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_LOW>;
>>                          clocks = <&pericfg CLK_PERI_MSDC30_0>,
>> @@ -693,8 +692,7 @@
>>                  };
>>
>>                  mmc1: mmc@11240000 {
>> -                       compatible = "mediatek,mt8173-mmc",
>> -                                    "mediatek,mt8135-mmc";
>> +                       compatible = "mediatek,mt8173-mmc";
>>                          reg = <0 0x11240000 0 0x1000>;
>>                          interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
>>                          clocks = <&pericfg CLK_PERI_MSDC30_1>,
>> @@ -704,8 +702,7 @@
>>                  };
>>
>>                  mmc2: mmc@11250000 {
>> -                       compatible = "mediatek,mt8173-mmc",
>> -                                    "mediatek,mt8135-mmc";
>> +                       compatible = "mediatek,mt8173-mmc";
>>                          reg = <0 0x11250000 0 0x1000>;
>>                          interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
>>                          clocks = <&pericfg CLK_PERI_MSDC30_2>,
>> @@ -715,8 +712,7 @@
>>                  };
>>
>>                  mmc3: mmc@11260000 {
>> -                       compatible = "mediatek,mt8173-mmc",
>> -                                    "mediatek,mt8135-mmc";
>> +                       compatible = "mediatek,mt8173-mmc";
>>                          reg = <0 0x11260000 0 0x1000>;
>>                          interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_LOW>;
>>                          clocks = <&pericfg CLK_PERI_MSDC30_3>,
>> --
>> 1.8.1.1.dirty
>>
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Ulf Hansson Oct. 10, 2017, 11:10 a.m. UTC | #3
On 10 October 2017 at 13:06, Matthias Brugger <matthias.bgg@gmail.com> wrote:
>
>
> On 10/10/2017 12:49 PM, Ulf Hansson wrote:
>>
>> On 10 October 2017 at 11:30, Chaotian Jing <chaotian.jing@mediatek.com>
>> wrote:
>>>
>>> devicetree bindings has been updated to support multi-platforms,
>>> so that each platform has its owns compatible name.
>>> And, this compatible name may used in driver to distinguish with
>>> other platform.
>>>
>>> Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
>>
>>
>> I assume there is no dependency to the rest or the series on this, so
>> this can go via arm soc?
>>
>
>
> Not in the sense of a merge conflict or something, but mt8173-mmc won't work
> until patch 2/12 is merged as well. If we want to be conservative, we should
> wait for this patch until the next kernel release. In the end it's just a
> cleanup of the dtsi.

In such case I can pick it part of this series, just need your ack.

Kind regards
Uffe
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Matthias Brugger Oct. 10, 2017, 11:11 a.m. UTC | #4
On 10/10/2017 01:10 PM, Ulf Hansson wrote:
> On 10 October 2017 at 13:06, Matthias Brugger <matthias.bgg@gmail.com> wrote:
>>
>>
>> On 10/10/2017 12:49 PM, Ulf Hansson wrote:
>>>
>>> On 10 October 2017 at 11:30, Chaotian Jing <chaotian.jing@mediatek.com>
>>> wrote:
>>>>
>>>> devicetree bindings has been updated to support multi-platforms,
>>>> so that each platform has its owns compatible name.
>>>> And, this compatible name may used in driver to distinguish with
>>>> other platform.
>>>>
>>>> Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
>>>
>>>
>>> I assume there is no dependency to the rest or the series on this, so
>>> this can go via arm soc?
>>>
>>
>>
>> Not in the sense of a merge conflict or something, but mt8173-mmc won't work
>> until patch 2/12 is merged as well. If we want to be conservative, we should
>> wait for this patch until the next kernel release. In the end it's just a
>> cleanup of the dtsi.
> 
> In such case I can pick it part of this series, just need your ack.
> 

Acked-by: Matthias Brugger <matthias.bgg@gmail.com>

Having a look on the patch, I don't expect it to create any merge conflicts.

Thanks,
Matthias
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Julien Thierry Oct. 10, 2017, 4:57 p.m. UTC | #5
Hi,

On 10/10/17 10:30, Chaotian Jing wrote:
> from mt2701, the register of PAD_TUNE has been phased out,
> while there is a new register of PAD_TUNE0
> 
> Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
> ---
>   drivers/mmc/host/mtk-sd.c | 69 ++++++++++++++++++++++++++++++++++-------------
>   1 file changed, 51 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
> index ab2fbbb..0dc45b3 100644
> --- a/drivers/mmc/host/mtk-sd.c
> +++ b/drivers/mmc/host/mtk-sd.c
> @@ -75,6 +75,7 @@
>   #define MSDC_PATCH_BIT   0xb0
>   #define MSDC_PATCH_BIT1  0xb4
>   #define MSDC_PAD_TUNE    0xec
> +#define MSDC_PAD_TUNE0   0xf0
>   #define PAD_DS_TUNE      0x188
>   #define PAD_CMD_TUNE     0x18c
>   #define EMMC50_CFG0      0x208
> @@ -301,6 +302,7 @@ struct msdc_save_para {
>   struct mtk_mmc_compatible {
>   	u8 clk_div_bits;
>   	bool hs400_tune; /* only used for MT8173 */
> +	bool pad_tune0;

You only use this to decide whether to use MDSC_PAD_TUNE or 
MSDC_PAD_TUNE0 as tune regs.

Couldn't this field directly be a 'u32' that is either MDSC_PAD_TUNE or 
MDSC_PAD_TUNE0 rather than a bool?

>   };
>   
>   struct msdc_tune_para {
> @@ -362,21 +364,25 @@ struct msdc_host {
>   static const struct mtk_mmc_compatible mt8135_compat = {
>   	.clk_div_bits = 8,
>   	.hs400_tune = false,
> +	.pad_tune0 = false,

and here we could have (field could be renamed accordingly of course):

	.pad_tune0 = MDSC_PAD_TUNE,

>   };
>   
>   static const struct mtk_mmc_compatible mt8173_compat = {
>   	.clk_div_bits = 8,
>   	.hs400_tune = true,
> +	.pad_tune0 = false,
>   };
>   
>   static const struct mtk_mmc_compatible mt2701_compat = {
>   	.clk_div_bits = 12,
>   	.hs400_tune = false,
> +	.pad_tune0 = true,

here:
	.pad_tune0 = MDSC_PAD_TUNE0,

>   };
>   
>   static const struct mtk_mmc_compatible mt2712_compat = {
>   	.clk_div_bits = 12,
>   	.hs400_tune = false,
> +	.pad_tune0 = true,
>   };
>   
>   static const struct of_device_id msdc_of_ids[] = {
> @@ -581,6 +587,10 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz)
>   	u32 flags;
>   	u32 div;
>   	u32 sclk;
> +	u32 tune_reg = MSDC_PAD_TUNE;
> +
> +	if (host->dev_comp->pad_tune0)
> +		tune_reg = MSDC_PAD_TUNE0;

And this would not be needed here nor in the other functions, it could 
just be replaced by host->dev_comp->pad_tune0.

Thanks,
Chaotian Jing (井朝天) Oct. 11, 2017, 1:26 a.m. UTC | #6
On Tue, 2017-10-10 at 17:57 +0100, Julien Thierry wrote:
> Hi,
> 
> On 10/10/17 10:30, Chaotian Jing wrote:
> > from mt2701, the register of PAD_TUNE has been phased out,
> > while there is a new register of PAD_TUNE0
> > 
> > Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
> > ---
> >   drivers/mmc/host/mtk-sd.c | 69 ++++++++++++++++++++++++++++++++++-------------
> >   1 file changed, 51 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
> > index ab2fbbb..0dc45b3 100644
> > --- a/drivers/mmc/host/mtk-sd.c
> > +++ b/drivers/mmc/host/mtk-sd.c
> > @@ -75,6 +75,7 @@
> >   #define MSDC_PATCH_BIT   0xb0
> >   #define MSDC_PATCH_BIT1  0xb4
> >   #define MSDC_PAD_TUNE    0xec
> > +#define MSDC_PAD_TUNE0   0xf0
> >   #define PAD_DS_TUNE      0x188
> >   #define PAD_CMD_TUNE     0x18c
> >   #define EMMC50_CFG0      0x208
> > @@ -301,6 +302,7 @@ struct msdc_save_para {
> >   struct mtk_mmc_compatible {
> >   	u8 clk_div_bits;
> >   	bool hs400_tune; /* only used for MT8173 */
> > +	bool pad_tune0;
> 
> You only use this to decide whether to use MDSC_PAD_TUNE or 
> MSDC_PAD_TUNE0 as tune regs.
> 
> Couldn't this field directly be a 'u32' that is either MDSC_PAD_TUNE or 
> MDSC_PAD_TUNE0 rather than a bool?
> 
Thx, will change to "u32 pad_tune_reg;" at next version.
> >   };
> >   
> >   struct msdc_tune_para {
> > @@ -362,21 +364,25 @@ struct msdc_host {
> >   static const struct mtk_mmc_compatible mt8135_compat = {
> >   	.clk_div_bits = 8,
> >   	.hs400_tune = false,
> > +	.pad_tune0 = false,
> 
> and here we could have (field could be renamed accordingly of course):
> 
> 	.pad_tune0 = MDSC_PAD_TUNE,
> 
> >   };
> >   
> >   static const struct mtk_mmc_compatible mt8173_compat = {
> >   	.clk_div_bits = 8,
> >   	.hs400_tune = true,
> > +	.pad_tune0 = false,
> >   };
> >   
> >   static const struct mtk_mmc_compatible mt2701_compat = {
> >   	.clk_div_bits = 12,
> >   	.hs400_tune = false,
> > +	.pad_tune0 = true,
> 
> here:
> 	.pad_tune0 = MDSC_PAD_TUNE0,
> 
> >   };
> >   
> >   static const struct mtk_mmc_compatible mt2712_compat = {
> >   	.clk_div_bits = 12,
> >   	.hs400_tune = false,
> > +	.pad_tune0 = true,
> >   };
> >   
> >   static const struct of_device_id msdc_of_ids[] = {
> > @@ -581,6 +587,10 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz)
> >   	u32 flags;
> >   	u32 div;
> >   	u32 sclk;
> > +	u32 tune_reg = MSDC_PAD_TUNE;
> > +
> > +	if (host->dev_comp->pad_tune0)
> > +		tune_reg = MSDC_PAD_TUNE0;
> 
> And this would not be needed here nor in the other functions, it could 
> just be replaced by host->dev_comp->pad_tune0.
> 
> Thanks,
> 


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