| Message ID | 1259886292-12588-1-git-send-email-agraf@suse.de |
|---|---|
| State | New |
| Headers | show |
On Fri, Dec 04, 2009 at 01:24:52AM +0100, Alexander Graf wrote: > SeaBIOS needs to write to the f-segment. So it needs to have some way to set > that from read-only to read-write, write in it and when it's done set it to > read-only again. > > On PCI we have a mechanism for that. The ISA machine does not though. To stay > regression free and happily enable users to continue using the -M isapc machine > let's just map it as RAM on the ISA PC. > > Signed-off-by: Alexander Graf <agraf@suse.de> Thanks Alexander. Why not always map the f-segment as ram? On a PCI machine, both bochs bios and seabios will make it read-only at the end of POST regardless of how it started. -Kevin
On 04.12.2009, at 01:44, Kevin O'Connor wrote: > On Fri, Dec 04, 2009 at 01:24:52AM +0100, Alexander Graf wrote: >> SeaBIOS needs to write to the f-segment. So it needs to have some way to set >> that from read-only to read-write, write in it and when it's done set it to >> read-only again. >> >> On PCI we have a mechanism for that. The ISA machine does not though. To stay >> regression free and happily enable users to continue using the -M isapc machine >> let's just map it as RAM on the ISA PC. >> >> Signed-off-by: Alexander Graf <agraf@suse.de> > > Thanks Alexander. > > Why not always map the f-segment as ram? On a PCI machine, both bochs > bios and seabios will make it read-only at the end of POST regardless > of how it started. I merely wanted to fix the regression. If you think it's a good idea to always map it R/W, I'll gladly change the patch. Alex
diff --git a/hw/pc.c b/hw/pc.c index 8c1b7ea..90373cf 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -982,7 +982,7 @@ static void pc_init1(ram_addr_t ram_size, int ret, linux_boot, i; ram_addr_t ram_addr, bios_offset, option_rom_offset; ram_addr_t below_4g_mem_size, above_4g_mem_size = 0; - int bios_size, isa_bios_size; + int bios_size, isa_bios_size, f_seg_type; PCIBus *pci_bus; ISADevice *isa_dev; int piix3_devfn = -1; @@ -1073,9 +1073,27 @@ static void pc_init1(ram_addr_t ram_size, isa_bios_size = bios_size; if (isa_bios_size > (128 * 1024)) isa_bios_size = 128 * 1024; + + /* XXX + * + * Usually we would map this region read only, have the BIOS set it r/w + * when it needs to and have the BIOS also set it r/o when it's done + * messing with it. + * + * Unfortunately we don't export any device to the ISA PC machine that + * could do the r/w <-> r/o transition, so let's just always map it r/w + * there for now. + */ + + if (pci_enabled) { + f_seg_type = IO_MEM_ROM; + } else { + f_seg_type = 0; + } + cpu_register_physical_memory(0x100000 - isa_bios_size, isa_bios_size, - (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); + (bios_offset + bios_size - isa_bios_size) | f_seg_type);
SeaBIOS needs to write to the f-segment. So it needs to have some way to set that from read-only to read-write, write in it and when it's done set it to read-only again. On PCI we have a mechanism for that. The ISA machine does not though. To stay regression free and happily enable users to continue using the -M isapc machine let's just map it as RAM on the ISA PC. Signed-off-by: Alexander Graf <agraf@suse.de> --- hw/pc.c | 22 ++++++++++++++++++++-- 1 files changed, 20 insertions(+), 2 deletions(-)