[v2] Add support for Nyan-big

Message ID	1417699911-17901-1-git-send-email-sjg@chromium.org
State	Deferred
Headers	show Return-Path: <linux-tegra-owner@vger.kernel.org> From: Simon Glass <sjg@chromium.org> To: linux-tegra@vger.kernel.org Cc: Stephen Warren <swarren@wwwdotorg.org>, Simon Glass <sjg@chromium.org> Subject: [PATCH v2] Add support for Nyan-big Date: Thu, 4 Dec 2014 06:31:51 -0700 Message-Id: <1417699911-17901-1-git-send-email-sjg@chromium.org> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk

Simon Glass Dec. 4, 2014, 1:31 p.m. UTC

Add support for Tegra124 Nyan-big. Pinmux is based on norrin with a single
change for the reset GPIO.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

Changes in v2:
- Rename from Nyan to Nyan-big

 configs/nyan-big.board | 198 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 198 insertions(+)
 create mode 100644 configs/nyan-big.board

Tomeu Vizoso Jan. 7, 2015, 1:02 p.m. UTC | #1

On 4 December 2014 at 14:31, Simon Glass <sjg@chromium.org> wrote:
> Add support for Tegra124 Nyan-big. Pinmux is based on norrin with a single
> change for the reset GPIO.

Hi Simon,

do you have a similar patch for the blaze?

Thanks,

Tomeu

> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2:
> - Rename from Nyan to Nyan-big
>
>  configs/nyan-big.board | 198 +++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 198 insertions(+)
>  create mode 100644 configs/nyan-big.board
>
> diff --git a/configs/nyan-big.board b/configs/nyan-big.board
> new file mode 100644
> index 0000000..7da5b4d
> --- /dev/null
> +++ b/configs/nyan-big.board
> @@ -0,0 +1,198 @@
> +soc = 'tegra124'
> +
> +pins = (
> +    #pin,                      mux,           gpio_init, pull,   tri,   e_inp, od,    rcv_sel
> +    ('dap_mclk1_pw4',          'extperiph1',  None,      'none', False, False, False, False),
> +    ('dap_mclk1_req_pee2',     'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap1_din_pn1',           'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap1_dout_pn2',          'i2s0',        None,      'down', True,  False, False, False),
> +    ('dap1_fs_pn0',            'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap1_sclk_pn3',          'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap2_din_pa4',           'i2s1',        None,      'none', False, True,  False, False),
> +    ('dap2_dout_pa5',          'i2s1',        None,      'none', False, True,  False, False),
> +    ('dap2_fs_pa2',            'i2s1',        None,      'none', False, True,  False, False),
> +    ('dap2_sclk_pa3',          'i2s1',        None,      'none', False, True,  False, False),
> +    ('gpio_x4_aud_px4',        None,          'in',      'none', False, True,  False, False),
> +    ('gpio_x5_aud_px5',        'rsvd4',       None,      'down', True,  False, False, False),
> +    ('gpio_x6_aud_px6',        'gmi',         None,      'down', True,  False, False, False),
> +    ('gpio_x7_aud_px7',        None,          'out0',    'none', False, False, False, False),
> +    ('gpio_w2_aud_pw2',        'rsvd2',       None,      'down', True,  False, False, False),
> +    ('gpio_w3_aud_pw3',        None,          'in',      'none', False, True,  False, False),
> +    ('dvfs_pwm_px0',           'cldvfs',      None,      'none', False, False, False, False),
> +    ('gpio_x1_aud_px1',        None,          'in',      'none', False, True,  False, False),
> +    ('dvfs_clk_px2',           'cldvfs',      None,      'none', False, False, False, False),
> +    ('gpio_x3_aud_px3',        'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap3_din_pp1',           'i2s2',        None,      'down', True,  False, False, False),
> +    ('dap3_dout_pp2',          None,          'out0',    'none', False, False, False, False),
> +    ('dap3_fs_pp0',            'i2s2',        None,      'down', True,  False, False, False),
> +    ('dap3_sclk_pp3',          'rsvd3',       None,      'down', True,  False, False, False),
> +    ('pv0',                    None,          'in',      'none', False, True,  False, False),
> +    ('pv1',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('ulpi_clk_py0',           'spi1',        None,      'none', False, False, False, False),
> +    ('ulpi_data0_po1',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data1_po2',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data2_po3',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data3_po4',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data4_po5',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data5_po6',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data6_po7',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data7_po0',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_dir_py1',           'spi1',        None,      'none', False, True,  False, False),
> +    ('ulpi_nxt_py2',           'spi1',        None,      'none', False, False, False, False),
> +    ('ulpi_stp_py3',           'spi1',        None,      'none', False, False, False, False),
> +    ('cam_i2c_scl_pbb1',       'rsvd3',       None,      'down', True,  False, False, False),
> +    ('cam_i2c_sda_pbb2',       'rsvd3',       None,      'down', True,  False, False, False),
> +    ('cam_mclk_pcc0',          'vi',          None,      'down', True,  False, False, False),
> +    ('pbb0',                   'vgp6',        None,      'down', True,  False, False, False),
> +    ('pbb3',                   'vgp3',        None,      'down', True,  False, False, False),
> +    ('pbb4',                   'vgp4',        None,      'down', True,  False, False, False),
> +    ('pbb5',                   'rsvd3',       None,      'down', True,  False, False, False),
> +    ('pbb6',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pbb7',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pcc1',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pcc2',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('gen2_i2c_scl_pt5',       'i2c2',        None,      'none', False, True,  True,  False),
> +    ('gen2_i2c_sda_pt6',       'i2c2',        None,      'none', False, True,  True,  False),
> +    ('pj7',                    None,          'in',      'none', False, True,  False, False),
> +    ('pb0',                    'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pb1',                    'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pk7',                    None,          'in',      'none', False, True,  False, False),
> +    ('pg0',                    None,          'in',      'none', False, True,  False, False),
> +    ('pg1',                    None,          'in',      'none', False, True,  False, False),
> +    ('ph2',                    None,          'in',      'none', False, True,  False, False),
> +    ('ph3',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('ph4',                    None,          'in',      'none', False, True,  False, False),
> +    ('ph5',                    'rsvd2',       None,      'down', True,  False, False, False),
> +    ('ph6',                    None,          'in',      'none', False, True,  False, False),
> +    ('ph7',                    None,          'out1',    'none', False, False, False, False),
> +    ('pg2',                    None,          'in',      'none', False, True,  False, False),
> +    ('pg3',                    None,          'in',      'none', False, True,  False, False),
> +    ('pg4',                    'spi4',        None,      'none', False, False, False, False),
> +    ('pg5',                    'spi4',        None,      'none', False, False, False, False),
> +    ('pg6',                    'spi4',        None,      'none', False, False, False, False),
> +    ('pg7',                    'spi4',        None,      'none', False, True,  False, False),
> +    ('ph0',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('ph1',                    'pwm1',        None,      'none', False, False, False, False),
> +    ('pk0',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('pk1',                    None,          'out0',    'none', False, False, False, False),
> +    ('pj0',                    None,          'in',      'up',   False, True,  False, False),
> +    ('pj2',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('pk3',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('pk4',                    None,          'out0',    'up',   False, False, False, False),
> +    ('pk2',                    None,          'in',      'none', False, True,  False, False),
> +    ('pi3',                    'spi4',        None,      'none', False, False, False, False),
> +    ('pi6',                    None,          'in',      'none', False, True,  False, False),
> +    ('pi2',                    'rsvd4',       None,      'down', True,  False, False, False),
> +    ('pi5',                    None,          'out1',    'up',   False, False, False, False),
> +    ('pi1',                    None,          'in',      'none', False, True,  False, False),
> +    ('pi4',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('pi7',                    None,          'in',      'none', False, True,  False, False),
> +    ('pc7',                    None,          'in',      'none', False, True,  False, False),
> +    ('pi0',                    None,          'in',      'none', False, True,  False, False),
> +    ('pex_l0_clkreq_n_pdd2',   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pex_l0_rst_n_pdd1',      'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pex_l1_clkreq_n_pdd6',   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pex_l1_rst_n_pdd5',      'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pex_wake_n_pdd3',        'rsvd2',       None,      'down', True,  False, False, False),
> +    ('usb_vbus_en2_pff1',      'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pff2',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('clk2_out_pw5',           'rsvd2',       None,      'down', True,  False, False, False),
> +    ('clk2_req_pcc5',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('sdmmc1_wp_n_pv3',        'sdmmc1',      None,      'down', True,  False, False, False),
> +    ('sdmmc1_clk_pz0',         'sdmmc1',      None,      'none', False, True,  False, False),
> +    ('sdmmc1_cmd_pz1',         'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc1_dat0_py7',        'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc1_dat1_py6',        'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc1_dat2_py5',        'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc1_dat3_py4',        'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none', False, False, False, False),
> +    ('sdmmc3_cmd_pa7',         'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_dat0_pb7',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_dat1_pb6',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_dat2_pb5',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_dat3_pb4',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'none', False, False, False, False),
> +    ('sdmmc3_clk_lb_in_pee5',  'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_clk_pcc4',        'sdmmc4',      None,      'none', False, True,  False, False),
> +    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'none', False, True,  False, False),
> +    ('sdmmc4_dat0_paa0',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat1_paa1',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat2_paa2',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat3_paa3',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat4_paa4',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat5_paa5',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat6_paa6',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat7_paa7',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('kb_col0_pq0',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_col1_pq1',            'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_col2_pq2',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_col3_pq3',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_col4_pq4',            'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('kb_col5_pq5',            'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_col6_pq6',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_col7_pq7',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_row0_pr0',            None,          'out0',    'none', False, False, False, False),
> +    ('kb_row1_pr1',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_row10_ps2',           'uarta',       None,      'none', False, True,  False, False),
> +    ('kb_row11_ps3',           None,          'out0',    'none', False, False, False, False),
> +    ('kb_row12_ps4',           None,          'out0',    'none', False, False, False, False),
> +    ('kb_row13_ps5',           'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row14_ps6',           'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row15_ps7',           None,          'in',      'none', False, True,  False, False),
> +    ('kb_row16_pt0',           'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row17_pt1',           None,          'in',      'none', False, True,  False, False),
> +    ('kb_row2_pr2',            'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row3_pr3',            'kbc',         None,      'down', True,  False, False, False),
> +    ('kb_row4_pr4',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_row5_pr5',            'rsvd3',       None,      'down', True,  False, False, False),
> +    ('kb_row6_pr6',            'kbc',         None,      'down', True,  False, False, False),
> +    ('kb_row7_pr7',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_row8_ps0',            'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row9_ps1',            'uarta',       None,      'down', False, False, False, False),
> +    ('sdmmc3_cd_n_pv2',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('clk_32k_out_pa0',        None,          'in',      'none', False, True,  False, False),
> +    ('pwr_i2c_scl_pz6',        'i2cpwr',      None,      'none', False, True,  True,  False),
> +    ('pwr_i2c_sda_pz7',        'i2cpwr',      None,      'none', False, True,  True,  False),
> +    ('jtag_rtck',              'rtck',        None,      'none', False, False, False, False),
> +    ('clk_32k_in',             'clk',         None,      'none', False, True,  False, False),
> +    ('core_pwr_req',           'pwron',       None,      'none', False, False, False, False),
> +    ('cpu_pwr_req',            'cpu',         None,      'none', False, False, False, False),
> +    ('pwr_int_n',              'pmi',         None,      'none', False, True,  False, False),
> +    ('reset_out_n',            'reset_out_n', None,      'none', False, False, False, False),
> +    ('clk3_out_pee0',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('clk3_req_pee1',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('dap4_din_pp5',           'rsvd3',       None,      'down', True,  False, False, False),
> +    ('dap4_dout_pp6',          'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap4_fs_pp4',            'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap4_sclk_pp7',          'rsvd3',       None,      'down', True,  False, False, False),
> +    ('gen1_i2c_scl_pc4',       'i2c1',        None,      'none', False, True,  True,  False),
> +    ('gen1_i2c_sda_pc5',       'i2c1',        None,      'none', False, True,  True,  False),
> +    ('pu0',                    'rsvd4',       None,      'down', True,  False, False, False),
> +    ('pu1',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('pu2',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('pu3',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('pu4',                    None,          'in',      'none', False, True,  False, False),
> +    ('pu5',                    None,          'in',      'up',   False, True,  False, False),
> +    ('pu6',                    None,          'in',      'up',   False, True,  False, False),
> +    ('uart2_cts_n_pj5',        'gmi',         None,      'down', True,  False, False, False),
> +    ('uart2_rts_n_pj6',        'gmi',         None,      'down', True,  False, False, False),
> +    ('uart2_rxd_pc3',          'irda',        None,      'down', True,  False, False, False),
> +    ('uart2_txd_pc2',          'irda',        None,      'down', True,  False, False, False),
> +    ('uart3_cts_n_pa1',        'gmi',         None,      'down', True,  False, False, False),
> +    ('uart3_rts_n_pc0',        'gmi',         None,      'down', True,  False, False, False),
> +    ('uart3_rxd_pw7',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('uart3_txd_pw6',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('owr',                    'rsvd2',       None,      'down', True,  False, False, False),
> +    ('hdmi_cec_pee3',          'cec',         None,      'none', False, True,  True,  False),
> +    ('hdmi_int_pn7',           None,          'in',      'down', False, True,  False, False),
> +    ('ddc_scl_pv4',            'i2c4',        None,      'none', False, True,  False, False),
> +    ('ddc_sda_pv5',            'i2c4',        None,      'none', False, True,  False, False),
> +    ('spdif_out_pk5',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('spdif_in_pk6',           None,          'out0',    'down', False, False, False, False),
> +    ('usb_vbus_en0_pn4',       'usb',         None,      'none', False, True,  True,  False),
> +    ('usb_vbus_en1_pn5',       'usb',         None,      'none', False, True,  True,  False),
> +    ('dp_hpd_pff0',            'dp',          None,      'up',   False, True,  False, False),
> +)
> +
> +drive_groups = (
> +)
> --
> 2.2.0.rc0.207.ga3a616c
>
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Simon Glass Jan. 7, 2015, 4:27 p.m. UTC | #2

Hi Tomeu,

On 7 January 2015 at 06:02, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>
> On 4 December 2014 at 14:31, Simon Glass <sjg@chromium.org> wrote:
> > Add support for Tegra124 Nyan-big. Pinmux is based on norrin with a single
> > change for the reset GPIO.
>
> Hi Simon,
>
> do you have a similar patch for the blaze?
>
> Thanks,
>
> Tomeu

No I don't sorry. I suppose it is similar but I'm not sure who did the
pinmux for it.

Regards,
Simon
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Tomeu Vizoso Jan. 8, 2015, 7:54 a.m. UTC | #3

On 7 January 2015 at 17:27, Simon Glass <sjg@chromium.org> wrote:
> Hi Tomeu,
>
> On 7 January 2015 at 06:02, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>>
>> On 4 December 2014 at 14:31, Simon Glass <sjg@chromium.org> wrote:
>> > Add support for Tegra124 Nyan-big. Pinmux is based on norrin with a single
>> > change for the reset GPIO.
>>
>> Hi Simon,
>>
>> do you have a similar patch for the blaze?
>>
>> Thanks,
>>
>> Tomeu
>
> No I don't sorry. I suppose it is similar but I'm not sure who did the
> pinmux for it.

I have found some non-trivial differences when comparing the pinmux
programming for the two boards in the chromeos kernel, that's why I
would prefer if we had the complete data in tegra-pinmux-scripts.

Dylan, Rhyland, git-blame points to both of you, do you have the
spreadsheet for the blaze or know who could have it?

Thanks,

Tomeu
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Dylan Reid Jan. 8, 2015, 10:33 p.m. UTC | #4

On Wed, Jan 7, 2015 at 11:54 PM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
> On 7 January 2015 at 17:27, Simon Glass <sjg@chromium.org> wrote:
>> Hi Tomeu,
>>
>> On 7 January 2015 at 06:02, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>>>
>>> On 4 December 2014 at 14:31, Simon Glass <sjg@chromium.org> wrote:
>>> > Add support for Tegra124 Nyan-big. Pinmux is based on norrin with a single
>>> > change for the reset GPIO.
>>>
>>> Hi Simon,
>>>
>>> do you have a similar patch for the blaze?
>>>
>>> Thanks,
>>>
>>> Tomeu
>>
>> No I don't sorry. I suppose it is similar but I'm not sure who did the
>> pinmux for it.
>
> I have found some non-trivial differences when comparing the pinmux
> programming for the two boards in the chromeos kernel, that's why I
> would prefer if we had the complete data in tegra-pinmux-scripts.

The differences between Big and Blaze are small.  Four pins I think.
What differences were you seeing?

>
> Dylan, Rhyland, git-blame points to both of you, do you have the
> spreadsheet for the blaze or know who could have it?

We didn't derive the pinmux from a spreadsheet for Big or Blaze.  Big
was so similar to Norrin that the few changes were made manually.

Thanks for looking at this!

Dylan

>
> Thanks,
>
> Tomeu
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Tomeu Vizoso Jan. 9, 2015, 5:58 a.m. UTC | #5

On 8 January 2015 at 23:33, Dylan Reid <dgreid@chromium.org> wrote:
> On Wed, Jan 7, 2015 at 11:54 PM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>> On 7 January 2015 at 17:27, Simon Glass <sjg@chromium.org> wrote:
>>> Hi Tomeu,
>>>
>>> On 7 January 2015 at 06:02, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>>>>
>>>> On 4 December 2014 at 14:31, Simon Glass <sjg@chromium.org> wrote:
>>>> > Add support for Tegra124 Nyan-big. Pinmux is based on norrin with a single
>>>> > change for the reset GPIO.
>>>>
>>>> Hi Simon,
>>>>
>>>> do you have a similar patch for the blaze?
>>>>
>>>> Thanks,
>>>>
>>>> Tomeu
>>>
>>> No I don't sorry. I suppose it is similar but I'm not sure who did the
>>> pinmux for it.
>>
>> I have found some non-trivial differences when comparing the pinmux
>> programming for the two boards in the chromeos kernel, that's why I
>> would prefer if we had the complete data in tegra-pinmux-scripts.
>
> The differences between Big and Blaze are small.  Four pins I think.
> What differences were you seeing?

So far I have had to change programming of usb_vbus_en2_pff1 and sdmmc1_clk_pz0.

>> Dylan, Rhyland, git-blame points to both of you, do you have the
>> spreadsheet for the blaze or know who could have it?
>
> We didn't derive the pinmux from a spreadsheet for Big or Blaze.  Big
> was so similar to Norrin that the few changes were made manually.

Ah, that's cool, was kind of fearing that I would be finding more and
more pins that need to be changed but without an authoritative source
I would be wasting quite some time.

Regards,

Tomeu

> Thanks for looking at this!
>
> Dylan
>
>>
>> Thanks,
>>
>> Tomeu
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Tomeu Vizoso Jan. 15, 2015, 5:11 p.m. UTC | #6

I have seen that coreboot configures these ones differently:

-    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
False, False, False, False),
+    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
False, True,  False, False),
-    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'none',
False, False, False, False),
+    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'down',
False, True,  False, False),
-    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'none',
False, True,  False, False),
+    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'up',
False, True,  False, False),
-    ('dp_hpd_pff0',            'dp',          None,      'up',
False, True,  False, False),
+    ('dp_hpd_pff0',            'dp',          None,      'none',
False, True,  False, False),

May be good to have them match?

Besides, I have collected these differences between blaze and big,
could you check with what you know?

-    ('usb_vbus_en2_pff1',      'rsvd2',       None,      'down',
True,  False, False, False),
+    ('usb_vbus_en2_pff1',      'usb',         None,      'up',
False, True,  False, False),
-    ('usb_vbus_en0_pn4',       'usb',         None,      'none',
False, True,  True,  False),
-    ('usb_vbus_en1_pn5',       'usb',         None,      'none',
False, True,  True,  False),
+    ('usb_vbus_en0_pn4',       'usb',         None,      'up',
False, True,  False, False),
+    ('usb_vbus_en1_pn5',       'usb',         None,      'up',
False, True,  False, False),

Thanks,

Tomeu

On 4 December 2014 at 14:31, Simon Glass <sjg@chromium.org> wrote:
> Add support for Tegra124 Nyan-big. Pinmux is based on norrin with a single
> change for the reset GPIO.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2:
> - Rename from Nyan to Nyan-big
>
>  configs/nyan-big.board | 198 +++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 198 insertions(+)
>  create mode 100644 configs/nyan-big.board
>
> diff --git a/configs/nyan-big.board b/configs/nyan-big.board
> new file mode 100644
> index 0000000..7da5b4d
> --- /dev/null
> +++ b/configs/nyan-big.board
> @@ -0,0 +1,198 @@
> +soc = 'tegra124'
> +
> +pins = (
> +    #pin,                      mux,           gpio_init, pull,   tri,   e_inp, od,    rcv_sel
> +    ('dap_mclk1_pw4',          'extperiph1',  None,      'none', False, False, False, False),
> +    ('dap_mclk1_req_pee2',     'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap1_din_pn1',           'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap1_dout_pn2',          'i2s0',        None,      'down', True,  False, False, False),
> +    ('dap1_fs_pn0',            'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap1_sclk_pn3',          'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap2_din_pa4',           'i2s1',        None,      'none', False, True,  False, False),
> +    ('dap2_dout_pa5',          'i2s1',        None,      'none', False, True,  False, False),
> +    ('dap2_fs_pa2',            'i2s1',        None,      'none', False, True,  False, False),
> +    ('dap2_sclk_pa3',          'i2s1',        None,      'none', False, True,  False, False),
> +    ('gpio_x4_aud_px4',        None,          'in',      'none', False, True,  False, False),
> +    ('gpio_x5_aud_px5',        'rsvd4',       None,      'down', True,  False, False, False),
> +    ('gpio_x6_aud_px6',        'gmi',         None,      'down', True,  False, False, False),
> +    ('gpio_x7_aud_px7',        None,          'out0',    'none', False, False, False, False),
> +    ('gpio_w2_aud_pw2',        'rsvd2',       None,      'down', True,  False, False, False),
> +    ('gpio_w3_aud_pw3',        None,          'in',      'none', False, True,  False, False),
> +    ('dvfs_pwm_px0',           'cldvfs',      None,      'none', False, False, False, False),
> +    ('gpio_x1_aud_px1',        None,          'in',      'none', False, True,  False, False),
> +    ('dvfs_clk_px2',           'cldvfs',      None,      'none', False, False, False, False),
> +    ('gpio_x3_aud_px3',        'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap3_din_pp1',           'i2s2',        None,      'down', True,  False, False, False),
> +    ('dap3_dout_pp2',          None,          'out0',    'none', False, False, False, False),
> +    ('dap3_fs_pp0',            'i2s2',        None,      'down', True,  False, False, False),
> +    ('dap3_sclk_pp3',          'rsvd3',       None,      'down', True,  False, False, False),
> +    ('pv0',                    None,          'in',      'none', False, True,  False, False),
> +    ('pv1',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('ulpi_clk_py0',           'spi1',        None,      'none', False, False, False, False),
> +    ('ulpi_data0_po1',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data1_po2',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data2_po3',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data3_po4',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data4_po5',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data5_po6',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data6_po7',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_data7_po0',         'ulpi',        None,      'down', True,  False, False, False),
> +    ('ulpi_dir_py1',           'spi1',        None,      'none', False, True,  False, False),
> +    ('ulpi_nxt_py2',           'spi1',        None,      'none', False, False, False, False),
> +    ('ulpi_stp_py3',           'spi1',        None,      'none', False, False, False, False),
> +    ('cam_i2c_scl_pbb1',       'rsvd3',       None,      'down', True,  False, False, False),
> +    ('cam_i2c_sda_pbb2',       'rsvd3',       None,      'down', True,  False, False, False),
> +    ('cam_mclk_pcc0',          'vi',          None,      'down', True,  False, False, False),
> +    ('pbb0',                   'vgp6',        None,      'down', True,  False, False, False),
> +    ('pbb3',                   'vgp3',        None,      'down', True,  False, False, False),
> +    ('pbb4',                   'vgp4',        None,      'down', True,  False, False, False),
> +    ('pbb5',                   'rsvd3',       None,      'down', True,  False, False, False),
> +    ('pbb6',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pbb7',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pcc1',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pcc2',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('gen2_i2c_scl_pt5',       'i2c2',        None,      'none', False, True,  True,  False),
> +    ('gen2_i2c_sda_pt6',       'i2c2',        None,      'none', False, True,  True,  False),
> +    ('pj7',                    None,          'in',      'none', False, True,  False, False),
> +    ('pb0',                    'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pb1',                    'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pk7',                    None,          'in',      'none', False, True,  False, False),
> +    ('pg0',                    None,          'in',      'none', False, True,  False, False),
> +    ('pg1',                    None,          'in',      'none', False, True,  False, False),
> +    ('ph2',                    None,          'in',      'none', False, True,  False, False),
> +    ('ph3',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('ph4',                    None,          'in',      'none', False, True,  False, False),
> +    ('ph5',                    'rsvd2',       None,      'down', True,  False, False, False),
> +    ('ph6',                    None,          'in',      'none', False, True,  False, False),
> +    ('ph7',                    None,          'out1',    'none', False, False, False, False),
> +    ('pg2',                    None,          'in',      'none', False, True,  False, False),
> +    ('pg3',                    None,          'in',      'none', False, True,  False, False),
> +    ('pg4',                    'spi4',        None,      'none', False, False, False, False),
> +    ('pg5',                    'spi4',        None,      'none', False, False, False, False),
> +    ('pg6',                    'spi4',        None,      'none', False, False, False, False),
> +    ('pg7',                    'spi4',        None,      'none', False, True,  False, False),
> +    ('ph0',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('ph1',                    'pwm1',        None,      'none', False, False, False, False),
> +    ('pk0',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('pk1',                    None,          'out0',    'none', False, False, False, False),
> +    ('pj0',                    None,          'in',      'up',   False, True,  False, False),
> +    ('pj2',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('pk3',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('pk4',                    None,          'out0',    'up',   False, False, False, False),
> +    ('pk2',                    None,          'in',      'none', False, True,  False, False),
> +    ('pi3',                    'spi4',        None,      'none', False, False, False, False),
> +    ('pi6',                    None,          'in',      'none', False, True,  False, False),
> +    ('pi2',                    'rsvd4',       None,      'down', True,  False, False, False),
> +    ('pi5',                    None,          'out1',    'up',   False, False, False, False),
> +    ('pi1',                    None,          'in',      'none', False, True,  False, False),
> +    ('pi4',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('pi7',                    None,          'in',      'none', False, True,  False, False),
> +    ('pc7',                    None,          'in',      'none', False, True,  False, False),
> +    ('pi0',                    None,          'in',      'none', False, True,  False, False),
> +    ('pex_l0_clkreq_n_pdd2',   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pex_l0_rst_n_pdd1',      'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pex_l1_clkreq_n_pdd6',   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pex_l1_rst_n_pdd5',      'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pex_wake_n_pdd3',        'rsvd2',       None,      'down', True,  False, False, False),
> +    ('usb_vbus_en2_pff1',      'rsvd2',       None,      'down', True,  False, False, False),
> +    ('pff2',                   'rsvd2',       None,      'down', True,  False, False, False),
> +    ('clk2_out_pw5',           'rsvd2',       None,      'down', True,  False, False, False),
> +    ('clk2_req_pcc5',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('sdmmc1_wp_n_pv3',        'sdmmc1',      None,      'down', True,  False, False, False),
> +    ('sdmmc1_clk_pz0',         'sdmmc1',      None,      'none', False, True,  False, False),
> +    ('sdmmc1_cmd_pz1',         'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc1_dat0_py7',        'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc1_dat1_py6',        'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc1_dat2_py5',        'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc1_dat3_py4',        'sdmmc1',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none', False, False, False, False),
> +    ('sdmmc3_cmd_pa7',         'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_dat0_pb7',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_dat1_pb6',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_dat2_pb5',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_dat3_pb4',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'none', False, False, False, False),
> +    ('sdmmc3_clk_lb_in_pee5',  'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_clk_pcc4',        'sdmmc4',      None,      'none', False, True,  False, False),
> +    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'none', False, True,  False, False),
> +    ('sdmmc4_dat0_paa0',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat1_paa1',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat2_paa2',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat3_paa3',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat4_paa4',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat5_paa5',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat6_paa6',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('sdmmc4_dat7_paa7',       'sdmmc4',      None,      'up',   False, True,  False, False),
> +    ('kb_col0_pq0',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_col1_pq1',            'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_col2_pq2',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_col3_pq3',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_col4_pq4',            'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('kb_col5_pq5',            'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_col6_pq6',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_col7_pq7',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_row0_pr0',            None,          'out0',    'none', False, False, False, False),
> +    ('kb_row1_pr1',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_row10_ps2',           'uarta',       None,      'none', False, True,  False, False),
> +    ('kb_row11_ps3',           None,          'out0',    'none', False, False, False, False),
> +    ('kb_row12_ps4',           None,          'out0',    'none', False, False, False, False),
> +    ('kb_row13_ps5',           'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row14_ps6',           'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row15_ps7',           None,          'in',      'none', False, True,  False, False),
> +    ('kb_row16_pt0',           'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row17_pt1',           None,          'in',      'none', False, True,  False, False),
> +    ('kb_row2_pr2',            'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row3_pr3',            'kbc',         None,      'down', True,  False, False, False),
> +    ('kb_row4_pr4',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_row5_pr5',            'rsvd3',       None,      'down', True,  False, False, False),
> +    ('kb_row6_pr6',            'kbc',         None,      'down', True,  False, False, False),
> +    ('kb_row7_pr7',            None,          'in',      'none', False, True,  False, False),
> +    ('kb_row8_ps0',            'rsvd2',       None,      'down', True,  False, False, False),
> +    ('kb_row9_ps1',            'uarta',       None,      'down', False, False, False, False),
> +    ('sdmmc3_cd_n_pv2',        'sdmmc3',      None,      'up',   False, True,  False, False),
> +    ('clk_32k_out_pa0',        None,          'in',      'none', False, True,  False, False),
> +    ('pwr_i2c_scl_pz6',        'i2cpwr',      None,      'none', False, True,  True,  False),
> +    ('pwr_i2c_sda_pz7',        'i2cpwr',      None,      'none', False, True,  True,  False),
> +    ('jtag_rtck',              'rtck',        None,      'none', False, False, False, False),
> +    ('clk_32k_in',             'clk',         None,      'none', False, True,  False, False),
> +    ('core_pwr_req',           'pwron',       None,      'none', False, False, False, False),
> +    ('cpu_pwr_req',            'cpu',         None,      'none', False, False, False, False),
> +    ('pwr_int_n',              'pmi',         None,      'none', False, True,  False, False),
> +    ('reset_out_n',            'reset_out_n', None,      'none', False, False, False, False),
> +    ('clk3_out_pee0',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('clk3_req_pee1',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('dap4_din_pp5',           'rsvd3',       None,      'down', True,  False, False, False),
> +    ('dap4_dout_pp6',          'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap4_fs_pp4',            'rsvd4',       None,      'down', True,  False, False, False),
> +    ('dap4_sclk_pp7',          'rsvd3',       None,      'down', True,  False, False, False),
> +    ('gen1_i2c_scl_pc4',       'i2c1',        None,      'none', False, True,  True,  False),
> +    ('gen1_i2c_sda_pc5',       'i2c1',        None,      'none', False, True,  True,  False),
> +    ('pu0',                    'rsvd4',       None,      'down', True,  False, False, False),
> +    ('pu1',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('pu2',                    'rsvd1',       None,      'down', True,  False, False, False),
> +    ('pu3',                    'gmi',         None,      'down', True,  False, False, False),
> +    ('pu4',                    None,          'in',      'none', False, True,  False, False),
> +    ('pu5',                    None,          'in',      'up',   False, True,  False, False),
> +    ('pu6',                    None,          'in',      'up',   False, True,  False, False),
> +    ('uart2_cts_n_pj5',        'gmi',         None,      'down', True,  False, False, False),
> +    ('uart2_rts_n_pj6',        'gmi',         None,      'down', True,  False, False, False),
> +    ('uart2_rxd_pc3',          'irda',        None,      'down', True,  False, False, False),
> +    ('uart2_txd_pc2',          'irda',        None,      'down', True,  False, False, False),
> +    ('uart3_cts_n_pa1',        'gmi',         None,      'down', True,  False, False, False),
> +    ('uart3_rts_n_pc0',        'gmi',         None,      'down', True,  False, False, False),
> +    ('uart3_rxd_pw7',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('uart3_txd_pw6',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('owr',                    'rsvd2',       None,      'down', True,  False, False, False),
> +    ('hdmi_cec_pee3',          'cec',         None,      'none', False, True,  True,  False),
> +    ('hdmi_int_pn7',           None,          'in',      'down', False, True,  False, False),
> +    ('ddc_scl_pv4',            'i2c4',        None,      'none', False, True,  False, False),
> +    ('ddc_sda_pv5',            'i2c4',        None,      'none', False, True,  False, False),
> +    ('spdif_out_pk5',          'rsvd2',       None,      'down', True,  False, False, False),
> +    ('spdif_in_pk6',           None,          'out0',    'down', False, False, False, False),
> +    ('usb_vbus_en0_pn4',       'usb',         None,      'none', False, True,  True,  False),
> +    ('usb_vbus_en1_pn5',       'usb',         None,      'none', False, True,  True,  False),
> +    ('dp_hpd_pff0',            'dp',          None,      'up',   False, True,  False, False),
> +)
> +
> +drive_groups = (
> +)
> --
> 2.2.0.rc0.207.ga3a616c
>
> --
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Andrew Bresticker Jan. 15, 2015, 6:35 p.m. UTC | #7

Hi Tomeu,

On Thu, Jan 15, 2015 at 9:11 AM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
> I have seen that coreboot configures these ones differently:
>
> -    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
> False, False, False, False),
> +    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
> False, True,  False, False),
> -    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'none',
> False, False, False, False),
> +    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'down',
> False, True,  False, False),
> -    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'none',
> False, True,  False, False),
> +    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'up',
> False, True,  False, False),
> -    ('dp_hpd_pff0',            'dp',          None,      'up',
> False, True,  False, False),
> +    ('dp_hpd_pff0',            'dp',          None,      'none',
> False, True,  False, False),
>
> May be good to have them match?

I believe these should all be the same between Norrin (Nyan), Big, and
Blaze, so I'd go with whatever is in the Norrin pinmux config (which I
believe is what Simon's patch is based on).

> Besides, I have collected these differences between blaze and big,
> could you check with what you know?

These are the differences you've collected between blaze and big from
the schematic or... ?

> -    ('usb_vbus_en2_pff1',      'rsvd2',       None,      'down',
> True,  False, False, False),
> +    ('usb_vbus_en2_pff1',      'usb',         None,      'up',
> False, True,  False, False),

usb_vbus_en2 is not connected on all Nyan-based boards, so I would
just use whatever the Norrin config uses.

> -    ('usb_vbus_en0_pn4',       'usb',         None,      'none',
> False, True,  True,  False),
> -    ('usb_vbus_en1_pn5',       'usb',         None,      'none',
> False, True,  True,  False),
> +    ('usb_vbus_en0_pn4',       'usb',         None,      'up',
> False, True,  False, False),
> +    ('usb_vbus_en1_pn5',       'usb',         None,      'up',
> False, True,  False, False),

I would expect these to be like Venice2/Norrin: input enabled,
open-drain, no pull.

Thanks,
Andrew
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Tomeu Vizoso Jan. 16, 2015, 4 p.m. UTC | #8

On 15 January 2015 at 19:35, Andrew Bresticker <abrestic@chromium.org> wrote:
> Hi Tomeu,
>
> On Thu, Jan 15, 2015 at 9:11 AM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>> I have seen that coreboot configures these ones differently:
>>
>> -    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
>> False, False, False, False),
>> +    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
>> False, True,  False, False),
>> -    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'none',
>> False, False, False, False),
>> +    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'down',
>> False, True,  False, False),
>> -    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'none',
>> False, True,  False, False),
>> +    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'up',
>> False, True,  False, False),
>> -    ('dp_hpd_pff0',            'dp',          None,      'up',
>> False, True,  False, False),
>> +    ('dp_hpd_pff0',            'dp',          None,      'none',
>> False, True,  False, False),
>>
>> May be good to have them match?
>
> I believe these should all be the same between Norrin (Nyan), Big, and
> Blaze, so I'd go with whatever is in the Norrin pinmux config (which I
> believe is what Simon's patch is based on).

Even dp_hpd? In my testing I need to have pullup on big and with no
pull on blaze for the panel to work. I'm very weak in reading
schematics, but I see what I think is a pullup resistor in Big, and
none in Blaze.

>> Besides, I have collected these differences between blaze and big,
>> could you check with what you know?
>
> These are the differences you've collected between blaze and big from
> the schematic or... ?

Mainly from the ChromeOS sources, but I have checked in the schematics.

>> -    ('usb_vbus_en2_pff1',      'rsvd2',       None,      'down',
>> True,  False, False, False),
>> +    ('usb_vbus_en2_pff1',      'usb',         None,      'up',
>> False, True,  False, False),
>
> usb_vbus_en2 is not connected on all Nyan-based boards, so I would
> just use whatever the Norrin config uses.

Agreed.

>> -    ('usb_vbus_en0_pn4',       'usb',         None,      'none',
>> False, True,  True,  False),
>> -    ('usb_vbus_en1_pn5',       'usb',         None,      'none',
>> False, True,  True,  False),
>> +    ('usb_vbus_en0_pn4',       'usb',         None,      'up',
>> False, True,  False, False),
>> +    ('usb_vbus_en1_pn5',       'usb',         None,      'up',
>> False, True,  False, False),
>
> I would expect these to be like Venice2/Norrin: input enabled,
> open-drain, no pull.

What I have found is that coreboot configures them to be pullup for
both boards, and that in my testing the usb ports are enabled in that
case in both boards. If they have no pull, they work on big but don't
on blaze. The DTs in the ChromeOS kernel also configure those pins to
be pull up. And from my limited understanding of the schematics I
have, both lines have pullup resistors in both boards.

So in summary, I think that we should make this change to the pinmux
definition that Simon sent:

-    ('usb_vbus_en0_pn4',       'usb',         None,      'none',
False, True,  True,  False),
-    ('usb_vbus_en1_pn5',       'usb',         None,      'none',
False, True,  True,  False),
+    ('usb_vbus_en0_pn4',       'usb',         None,      'up',
False, True,  False, False),
+    ('usb_vbus_en1_pn5',       'usb',         None,      'up',
False, True,  False, False),

And that the Blaze should have this change, respective to Big:

-    ('dp_hpd_pff0',            'dp',          None,      'up',
False, True,  False, False),
+    ('dp_hpd_pff0',            'dp',          None,      'none',
False, True,  False, False),

Does it make sense?

Thanks,

Tomeu

> Thanks,
> Andrew
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Andrew Bresticker Jan. 16, 2015, 6:06 p.m. UTC | #9

On Fri, Jan 16, 2015 at 8:00 AM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
> On 15 January 2015 at 19:35, Andrew Bresticker <abrestic@chromium.org> wrote:
>> Hi Tomeu,
>>
>> On Thu, Jan 15, 2015 at 9:11 AM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>>> I have seen that coreboot configures these ones differently:
>>>
>>> -    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
>>> False, False, False, False),
>>> +    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
>>> False, True,  False, False),
>>> -    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'none',
>>> False, False, False, False),
>>> +    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'down',
>>> False, True,  False, False),
>>> -    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'none',
>>> False, True,  False, False),
>>> +    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'up',
>>> False, True,  False, False),
>>> -    ('dp_hpd_pff0',            'dp',          None,      'up',
>>> False, True,  False, False),
>>> +    ('dp_hpd_pff0',            'dp',          None,      'none',
>>> False, True,  False, False),
>>>
>>> May be good to have them match?
>>
>> I believe these should all be the same between Norrin (Nyan), Big, and
>> Blaze, so I'd go with whatever is in the Norrin pinmux config (which I
>> believe is what Simon's patch is based on).
>
> Even dp_hpd? In my testing I need to have pullup on big and with no
> pull on blaze for the panel to work. I'm very weak in reading
> schematics, but I see what I think is a pullup resistor in Big, and
> none in Blaze.

Maybe I'm missing something, but I don't see any difference between
Big and Blaze with respect to dp_hpd.  Coreboot also configures them
both with no pull.  I'll have to look into this more...

> So in summary, I think that we should make this change to the pinmux
> definition that Simon sent:
>
> -    ('usb_vbus_en0_pn4',       'usb',         None,      'none',
> False, True,  True,  False),
> -    ('usb_vbus_en1_pn5',       'usb',         None,      'none',
> False, True,  True,  False),
> +    ('usb_vbus_en0_pn4',       'usb',         None,      'up',
> False, True,  False, False),
> +    ('usb_vbus_en1_pn5',       'usb',         None,      'up',
> False, True,  False, False),

Yes.  It ends up not mattering what the pull is when using a mainline
DTS since they use a fixed regulator to drive these pins high, but
you're right, the most correct thing for VBUS is input enabled with
pull-up.
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Tomeu Vizoso Jan. 29, 2015, 2:22 p.m. UTC | #10

On 16 January 2015 at 19:06, Andrew Bresticker <abrestic@chromium.org> wrote:
> On Fri, Jan 16, 2015 at 8:00 AM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>> On 15 January 2015 at 19:35, Andrew Bresticker <abrestic@chromium.org> wrote:
>>> Hi Tomeu,
>>>
>>> On Thu, Jan 15, 2015 at 9:11 AM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>>>> I have seen that coreboot configures these ones differently:
>>>>
>>>> -    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
>>>> False, False, False, False),
>>>> +    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
>>>> False, True,  False, False),
>>>> -    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'none',
>>>> False, False, False, False),
>>>> +    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'down',
>>>> False, True,  False, False),
>>>> -    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'none',
>>>> False, True,  False, False),
>>>> +    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'up',
>>>> False, True,  False, False),
>>>> -    ('dp_hpd_pff0',            'dp',          None,      'up',
>>>> False, True,  False, False),
>>>> +    ('dp_hpd_pff0',            'dp',          None,      'none',
>>>> False, True,  False, False),
>>>>
>>>> May be good to have them match?
>>>
>>> I believe these should all be the same between Norrin (Nyan), Big, and
>>> Blaze, so I'd go with whatever is in the Norrin pinmux config (which I
>>> believe is what Simon's patch is based on).
>>
>> Even dp_hpd? In my testing I need to have pullup on big and with no
>> pull on blaze for the panel to work. I'm very weak in reading
>> schematics, but I see what I think is a pullup resistor in Big, and
>> none in Blaze.
>
> Maybe I'm missing something, but I don't see any difference between
> Big and Blaze with respect to dp_hpd.  Coreboot also configures them
> both with no pull.  I'll have to look into this more...

Sorry, I think I got confused somewhere there. In my most recent
testing, I need dp_hpd to be configured with no pull on big or I get
spurious interrupts. That caused problems only sometimes as it only
manifested in a race within the drm subsystem.

Simon, do you mind if I resend your patch to tegra-pinmux-scripts with
that pin fixed?

Thanks,

Tomeu

>> So in summary, I think that we should make this change to the pinmux
>> definition that Simon sent:
>>
>> -    ('usb_vbus_en0_pn4',       'usb',         None,      'none',
>> False, True,  True,  False),
>> -    ('usb_vbus_en1_pn5',       'usb',         None,      'none',
>> False, True,  True,  False),
>> +    ('usb_vbus_en0_pn4',       'usb',         None,      'up',
>> False, True,  False, False),
>> +    ('usb_vbus_en1_pn5',       'usb',         None,      'up',
>> False, True,  False, False),
>
> Yes.  It ends up not mattering what the pull is when using a mainline
> DTS since they use a fixed regulator to drive these pins high, but
> you're right, the most correct thing for VBUS is input enabled with
> pull-up.
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Simon Glass Jan. 29, 2015, 2:32 p.m. UTC | #11

Hi Tomeu,

On 29 January 2015 at 07:22, Tomeu Vizoso <tomeu.vizoso@gmail.com> wrote:
> On 16 January 2015 at 19:06, Andrew Bresticker <abrestic@chromium.org> wrote:
>> On Fri, Jan 16, 2015 at 8:00 AM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>>> On 15 January 2015 at 19:35, Andrew Bresticker <abrestic@chromium.org> wrote:
>>>> Hi Tomeu,
>>>>
>>>> On Thu, Jan 15, 2015 at 9:11 AM, Tomeu Vizoso <tomeu@tomeuvizoso.net> wrote:
>>>>> I have seen that coreboot configures these ones differently:
>>>>>
>>>>> -    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
>>>>> False, False, False, False),
>>>>> +    ('sdmmc3_clk_pa6',         'sdmmc3',      None,      'none',
>>>>> False, True,  False, False),
>>>>> -    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'none',
>>>>> False, False, False, False),
>>>>> +    ('sdmmc3_clk_lb_out_pee4', 'sdmmc3',      None,      'down',
>>>>> False, True,  False, False),
>>>>> -    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'none',
>>>>> False, True,  False, False),
>>>>> +    ('sdmmc4_cmd_pt7',         'sdmmc4',      None,      'up',
>>>>> False, True,  False, False),
>>>>> -    ('dp_hpd_pff0',            'dp',          None,      'up',
>>>>> False, True,  False, False),
>>>>> +    ('dp_hpd_pff0',            'dp',          None,      'none',
>>>>> False, True,  False, False),
>>>>>
>>>>> May be good to have them match?
>>>>
>>>> I believe these should all be the same between Norrin (Nyan), Big, and
>>>> Blaze, so I'd go with whatever is in the Norrin pinmux config (which I
>>>> believe is what Simon's patch is based on).
>>>
>>> Even dp_hpd? In my testing I need to have pullup on big and with no
>>> pull on blaze for the panel to work. I'm very weak in reading
>>> schematics, but I see what I think is a pullup resistor in Big, and
>>> none in Blaze.
>>
>> Maybe I'm missing something, but I don't see any difference between
>> Big and Blaze with respect to dp_hpd.  Coreboot also configures them
>> both with no pull.  I'll have to look into this more...
>
> Sorry, I think I got confused somewhere there. In my most recent
> testing, I need dp_hpd to be configured with no pull on big or I get
> spurious interrupts. That caused problems only sometimes as it only
> manifested in a race within the drm subsystem.
>
> Simon, do you mind if I resend your patch to tegra-pinmux-scripts with
> that pin fixed?

Please go ahead.

>
> Thanks,
>
> Tomeu
>
>>> So in summary, I think that we should make this change to the pinmux
>>> definition that Simon sent:
>>>
>>> -    ('usb_vbus_en0_pn4',       'usb',         None,      'none',
>>> False, True,  True,  False),
>>> -    ('usb_vbus_en1_pn5',       'usb',         None,      'none',
>>> False, True,  True,  False),
>>> +    ('usb_vbus_en0_pn4',       'usb',         None,      'up',
>>> False, True,  False, False),
>>> +    ('usb_vbus_en1_pn5',       'usb',         None,      'up',
>>> False, True,  False, False),
>>
>> Yes.  It ends up not mattering what the pull is when using a mainline
>> DTS since they use a fixed regulator to drive these pins high, but
>> you're right, the most correct thing for VBUS is input enabled with
>> pull-up.

Regards,
Simon
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[v2] Add support for Nyan-big

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