[04/10] rs6000: Remove addic from the normal add pattern

This means we can no longer add GPR0+imm.  Register allocation will have
to use a different register.


2014-12-08  Segher Boessenkool  <segher@kernel.crashing.org>

gcc/
	PR target/64180
	* config/rs6000/rs6000.md (*add<mode>3_internal1): Remove addic
	alternative.

---
 gcc/config/rs6000/rs6000.md | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

On Mon, Dec 08, 2014 at 09:44:44AM -0500, David Edelsohn wrote:
> > -;; Discourage ai/addic because of carry but provide it in an alternative
> > -;; allowing register zero as source.
> >  (define_insn "*add<mode>3_internal1"
> > -  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,?r,r")
> > -       (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,r,b")
> > -                 (match_operand:GPR 2 "add_operand" "r,I,I,L")))]
> > +  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,r")
> > +       (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,b")
> > +                 (match_operand:GPR 2 "add_operand" "r,I,L")))]
> >    "!DECIMAL_FLOAT_MODE_P (GET_MODE (operands[0])) && !DECIMAL_FLOAT_MODE_P (GET_MODE (operands[1]))"
> >    "@
> >     add %0,%1,%2
> >     addi %0,%1,%2
> > -   addic %0,%1,%2
> >     addis %0,%1,%v2"
> >    [(set_attr "type" "add")])
> 
> Why are you removing the alternative instead of clobbering XER[CA]?

I should have mentioned, sorry.

We don't want to clobber CA on *every* add, and reload can generate more
adds out of thin air.  And CA is a fixed register.

There may be a better way to do this, but I don't know it.


Segher

On Mon, Dec 8, 2014 at 10:01 AM, Segher Boessenkool
<segher@kernel.crashing.org> wrote:
> On Mon, Dec 08, 2014 at 09:44:44AM -0500, David Edelsohn wrote:
>> > -;; Discourage ai/addic because of carry but provide it in an alternative
>> > -;; allowing register zero as source.
>> >  (define_insn "*add<mode>3_internal1"
>> > -  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,?r,r")
>> > -       (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,r,b")
>> > -                 (match_operand:GPR 2 "add_operand" "r,I,I,L")))]
>> > +  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,r")
>> > +       (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,b")
>> > +                 (match_operand:GPR 2 "add_operand" "r,I,L")))]
>> >    "!DECIMAL_FLOAT_MODE_P (GET_MODE (operands[0])) && !DECIMAL_FLOAT_MODE_P (GET_MODE (operands[1]))"
>> >    "@
>> >     add %0,%1,%2
>> >     addi %0,%1,%2
>> > -   addic %0,%1,%2
>> >     addis %0,%1,%v2"
>> >    [(set_attr "type" "add")])
>>
>> Why are you removing the alternative instead of clobbering XER[CA]?
>
> I should have mentioned, sorry.
>
> We don't want to clobber CA on *every* add, and reload can generate more
> adds out of thin air.  And CA is a fixed register.
>
> There may be a better way to do this, but I don't know it.

Okay.

It's unfortunate that GCC does not have separate patterns for a safe
ADD used by reload.

Thanks, David

> It's unfortunate that GCC does not have separate patterns for a safe
> ADD used by reload.

It does, the addptrM3 pattern, but it works only with LRA at the moment.

On Tue, Dec 9, 2014 at 11:24 AM, Eric Botcazou <ebotcazou@adacore.com> wrote:
>> It's unfortunate that GCC does not have separate patterns for a safe
>> ADD used by reload.
>
> It does, the addptrM3 pattern, but it works only with LRA at the moment.

Hi, Eric

Segher and I previously discussed addptrM3, but I thought that it was
restricted in a different way.

We definitely will have to define addptrM3 and restore addM3 when
rs6000 switches to LRA.

Thanks, David

On Tue, Dec 09, 2014 at 11:48:44AM -0500, David Edelsohn wrote:
> We definitely will have to define addptrM3 and restore addM3 when
> rs6000 switches to LRA.

Can LRA deal with adding a clobber of a hard register?  How would
you express that in the patterns, anyway?


Segher

On Mon, Dec 08, 2014 at 09:01:39AM -0600, Segher Boessenkool wrote:
> > Why are you removing the alternative instead of clobbering XER[CA]?
> 
> I should have mentioned, sorry.
> 
> We don't want to clobber CA on *every* add, and reload can generate more
> adds out of thin air.  And CA is a fixed register.
> 
> There may be a better way to do this, but I don't know it.

Some numbers...

I checked how often the compiler used to allocate GPR0 here.  I looked
at cc1 of 4.7.2, 12MB text size.  It happened zero times (it already was
"?r" to discourage the RA / reload from using that alternative).

There are 143962 addi insns in there.


Segher