Message ID | 1417705394-19574-1-git-send-email-bmeng.cn@gmail.com |
---|---|
State | Superseded |
Delegated to: | Simon Glass |
Headers | show |
Hi Bin, On 4 December 2014 at 08:03, Bin Meng <bmeng.cn@gmail.com> wrote: > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > --- > configs/crownbay_defconfig | 6 ++++++ > include/configs/crownbay.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 58 insertions(+) > create mode 100644 configs/crownbay_defconfig > create mode 100644 include/configs/crownbay.h > > diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig > new file mode 100644 > index 0000000..ce90553 > --- /dev/null > +++ b/configs/crownbay_defconfig > @@ -0,0 +1,6 @@ > +CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff00000" > +CONFIG_X86=y > +CONFIG_TARGET_CROWNBAY=y > +CONFIG_OF_CONTROL=y > +CONFIG_OF_SEPARATE=y > +CONFIG_DEFAULT_DEVICE_TREE="crownbay" > diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h > new file mode 100644 > index 0000000..2314e62 > --- /dev/null > +++ b/include/configs/crownbay.h > @@ -0,0 +1,52 @@ > +/* > + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +/* > + * board/config.h - configuration options, board specific > + */ > + > +#ifndef __CONFIG_H > +#define __CONFIG_H > + > +#include <configs/x86-common.h> > + > +#define CONFIG_SYS_MONITOR_LEN (1 << 20) > +#define CONFIG_SYS_X86_START16 0xfffff800 > +#define CONFIG_BOARD_EARLY_INIT_F > + > +#define CONFIG_X86_RESET_VECTOR > +#define CONFIG_NR_DRAM_BANKS 1 > + > +#define CONFIG_COREBOOT_SERIAL Do you think you could create a patch to rename this to x86_serial? > +#define CONFIG_SMSC_LPC47M > + > +#define CONFIG_PCI_MEM_BUS 0x40000000 > +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS > +#define CONFIG_PCI_MEM_SIZE 0x80000000 > + > +#define CONFIG_PCI_PREF_BUS 0xc0000000 > +#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS > +#define CONFIG_PCI_PREF_SIZE 0x20000000 > + > +#define CONFIG_PCI_IO_BUS 0x2000 > +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS > +#define CONFIG_PCI_IO_SIZE 0xe000 > + > +#define CONFIG_SYS_EARLY_PCI_INIT > +#define CONFIG_PCI_PNP > + > +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ > + "stdout=serial\0" \ > + "stderr=serial\0" > + > +#define CONFIG_SCSI_DEV_LIST \ > + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA} > + > +/* Video is not supported */ > +#undef CONFIG_VIDEO > +#undef CONFIG_CFB_CONSOLE Why is video not supported? > + > +#endif /* __CONFIG_H */ > -- > 1.8.2.1 > Regards, Simon
Hi Simon, On Fri, Dec 5, 2014 at 7:56 AM, Simon Glass <sjg@chromium.org> wrote: > Hi Bin, > > On 4 December 2014 at 08:03, Bin Meng <bmeng.cn@gmail.com> wrote: >> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >> --- >> configs/crownbay_defconfig | 6 ++++++ >> include/configs/crownbay.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++ >> 2 files changed, 58 insertions(+) >> create mode 100644 configs/crownbay_defconfig >> create mode 100644 include/configs/crownbay.h >> >> diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig >> new file mode 100644 >> index 0000000..ce90553 >> --- /dev/null >> +++ b/configs/crownbay_defconfig >> @@ -0,0 +1,6 @@ >> +CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff00000" >> +CONFIG_X86=y >> +CONFIG_TARGET_CROWNBAY=y >> +CONFIG_OF_CONTROL=y >> +CONFIG_OF_SEPARATE=y >> +CONFIG_DEFAULT_DEVICE_TREE="crownbay" >> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h >> new file mode 100644 >> index 0000000..2314e62 >> --- /dev/null >> +++ b/include/configs/crownbay.h >> @@ -0,0 +1,52 @@ >> +/* >> + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> >> + * >> + * SPDX-License-Identifier: GPL-2.0+ >> + */ >> + >> +/* >> + * board/config.h - configuration options, board specific >> + */ >> + >> +#ifndef __CONFIG_H >> +#define __CONFIG_H >> + >> +#include <configs/x86-common.h> >> + >> +#define CONFIG_SYS_MONITOR_LEN (1 << 20) >> +#define CONFIG_SYS_X86_START16 0xfffff800 >> +#define CONFIG_BOARD_EARLY_INIT_F >> + >> +#define CONFIG_X86_RESET_VECTOR >> +#define CONFIG_NR_DRAM_BANKS 1 >> + >> +#define CONFIG_COREBOOT_SERIAL > > Do you think you could create a patch to rename this to x86_serial? Sure, I can. >> +#define CONFIG_SMSC_LPC47M >> + >> +#define CONFIG_PCI_MEM_BUS 0x40000000 >> +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS >> +#define CONFIG_PCI_MEM_SIZE 0x80000000 >> + >> +#define CONFIG_PCI_PREF_BUS 0xc0000000 >> +#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS >> +#define CONFIG_PCI_PREF_SIZE 0x20000000 >> + >> +#define CONFIG_PCI_IO_BUS 0x2000 >> +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS >> +#define CONFIG_PCI_IO_SIZE 0xe000 >> + >> +#define CONFIG_SYS_EARLY_PCI_INIT >> +#define CONFIG_PCI_PNP >> + >> +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ >> + "stdout=serial\0" \ >> + "stderr=serial\0" >> + >> +#define CONFIG_SCSI_DEV_LIST \ >> + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA} >> + >> +/* Video is not supported */ >> +#undef CONFIG_VIDEO >> +#undef CONFIG_CFB_CONSOLE > > Why is video not supported? > Tunnel Creek has one GPU integrated, but on my Crown Bay board, the output siginal is routed to LVDS to be connected to an external LCD, which I don't have for now. There is no public datasheet describing the details about the integrated GPU, neither did I found a legacy video ROM supporting that. There seems to be a UEFI native graphics driver from Intel, but that means I will need study that and write a U-Boot native graphics driver, which needs some time. Maybe supporting PCIe based graphics card is an option, and I will find some time to try that. Regards, Bin
Hi Bin, On 5 December 2014 at 06:53, Bin Meng <bmeng.cn@gmail.com> wrote: > Hi Simon, > > On Fri, Dec 5, 2014 at 7:56 AM, Simon Glass <sjg@chromium.org> wrote: >> Hi Bin, >> >> On 4 December 2014 at 08:03, Bin Meng <bmeng.cn@gmail.com> wrote: >>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >>> --- >>> configs/crownbay_defconfig | 6 ++++++ >>> include/configs/crownbay.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++ >>> 2 files changed, 58 insertions(+) >>> create mode 100644 configs/crownbay_defconfig >>> create mode 100644 include/configs/crownbay.h >>> >>> diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig >>> new file mode 100644 >>> index 0000000..ce90553 >>> --- /dev/null >>> +++ b/configs/crownbay_defconfig >>> @@ -0,0 +1,6 @@ >>> +CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff00000" >>> +CONFIG_X86=y >>> +CONFIG_TARGET_CROWNBAY=y >>> +CONFIG_OF_CONTROL=y >>> +CONFIG_OF_SEPARATE=y >>> +CONFIG_DEFAULT_DEVICE_TREE="crownbay" >>> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h >>> new file mode 100644 >>> index 0000000..2314e62 >>> --- /dev/null >>> +++ b/include/configs/crownbay.h >>> @@ -0,0 +1,52 @@ >>> +/* >>> + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> >>> + * >>> + * SPDX-License-Identifier: GPL-2.0+ >>> + */ >>> + >>> +/* >>> + * board/config.h - configuration options, board specific >>> + */ >>> + >>> +#ifndef __CONFIG_H >>> +#define __CONFIG_H >>> + >>> +#include <configs/x86-common.h> >>> + >>> +#define CONFIG_SYS_MONITOR_LEN (1 << 20) >>> +#define CONFIG_SYS_X86_START16 0xfffff800 >>> +#define CONFIG_BOARD_EARLY_INIT_F >>> + >>> +#define CONFIG_X86_RESET_VECTOR >>> +#define CONFIG_NR_DRAM_BANKS 1 >>> + >>> +#define CONFIG_COREBOOT_SERIAL >> >> Do you think you could create a patch to rename this to x86_serial? > > Sure, I can. > >>> +#define CONFIG_SMSC_LPC47M >>> + >>> +#define CONFIG_PCI_MEM_BUS 0x40000000 >>> +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS >>> +#define CONFIG_PCI_MEM_SIZE 0x80000000 >>> + >>> +#define CONFIG_PCI_PREF_BUS 0xc0000000 >>> +#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS >>> +#define CONFIG_PCI_PREF_SIZE 0x20000000 >>> + >>> +#define CONFIG_PCI_IO_BUS 0x2000 >>> +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS >>> +#define CONFIG_PCI_IO_SIZE 0xe000 >>> + >>> +#define CONFIG_SYS_EARLY_PCI_INIT >>> +#define CONFIG_PCI_PNP >>> + >>> +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ >>> + "stdout=serial\0" \ >>> + "stderr=serial\0" >>> + >>> +#define CONFIG_SCSI_DEV_LIST \ >>> + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA} >>> + >>> +/* Video is not supported */ >>> +#undef CONFIG_VIDEO >>> +#undef CONFIG_CFB_CONSOLE >> >> Why is video not supported? >> > > Tunnel Creek has one GPU integrated, but on my Crown Bay board, the > output siginal is routed to LVDS to be connected to an external LCD, > which I don't have for now. There is no public datasheet describing > the details about the integrated GPU, neither did I found a legacy > video ROM supporting that. There seems to be a UEFI native graphics > driver from Intel, but that means I will need study that and write a > U-Boot native graphics driver, which needs some time. Maybe supporting > PCIe based graphics card is an option, and I will find some time to > try that. I'm not so worried about PCIe-based graphics, although it might mostly work with a big of tweaking, since we can find and execute ROMs. But for built-in graphics I would like to support it. This is a key feature, and I hope there will be common elements. between the boards. Similarly with things like USB, Ethernet, SD card which you have addressed. Regards, Simon
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig new file mode 100644 index 0000000..ce90553 --- /dev/null +++ b/configs/crownbay_defconfig @@ -0,0 +1,6 @@ +CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff00000" +CONFIG_X86=y +CONFIG_TARGET_CROWNBAY=y +CONFIG_OF_CONTROL=y +CONFIG_OF_SEPARATE=y +CONFIG_DEFAULT_DEVICE_TREE="crownbay" diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h new file mode 100644 index 0000000..2314e62 --- /dev/null +++ b/include/configs/crownbay.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/x86-common.h> + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) +#define CONFIG_SYS_X86_START16 0xfffff800 +#define CONFIG_BOARD_EARLY_INIT_F + +#define CONFIG_X86_RESET_VECTOR +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_COREBOOT_SERIAL +#define CONFIG_SMSC_LPC47M + +#define CONFIG_PCI_MEM_BUS 0x40000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x80000000 + +#define CONFIG_PCI_PREF_BUS 0xc0000000 +#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS +#define CONFIG_PCI_PREF_SIZE 0x20000000 + +#define CONFIG_PCI_IO_BUS 0x2000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0xe000 + +#define CONFIG_SYS_EARLY_PCI_INIT +#define CONFIG_PCI_PNP + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +#define CONFIG_SCSI_DEV_LIST \ + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA} + +/* Video is not supported */ +#undef CONFIG_VIDEO +#undef CONFIG_CFB_CONSOLE + +#endif /* __CONFIG_H */
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- configs/crownbay_defconfig | 6 ++++++ include/configs/crownbay.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 configs/crownbay_defconfig create mode 100644 include/configs/crownbay.h