| Message ID | 1384267910-32066-11-git-send-email-iivanov@mm-sol.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
On Tue, Nov 12, 2013 at 02:51:45PM +0000, Ivan T. Ivanov wrote: > From: "Ivan T. Ivanov" <iivanov@mm-sol.com> > > Allows MSM OTG controller to be specified via device tree. > > Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> > Cc: devicetree@vger.kernel.org > --- > .../devicetree/bindings/usb/msm-hsusb.txt | 57 +++++++++++++- > drivers/usb/phy/phy-msm-usb.c | 79 +++++++++++++++++--- > 2 files changed, 124 insertions(+), 12 deletions(-) > > diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt > index 0a85eba..f1045e3 100644 > --- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt > +++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt > @@ -30,4 +30,59 @@ Required properties: > dr_mode = "peripheral"; > interrupts = <0 134 0>; > usb-phy = <&usb_otg>; > - }; > \ No newline at end of file > + }; > + > +USB PHY with optional OTG: > + > +Required properties: > +- compatible: should contain "qcom,usb-otg-ci" for chipsets with > + Chipidea 45nm PHY or "qcom,usb-otg-snps" for chipsets > + with Synopsys 28nm PHY To make this easier to read and extend in future, I'd reorganise this like so: compatible: should contain: * "qcom,usb-otg-ci" for chipsets with Chipidea 45nm PHY * "qcom,usb-otg-snps" for chipsets with Synopsys 28nm PHY > +- regs: offset and length of the register set in the memory map > +- interrupts: interrupt-specifier for the OTG interrupt. > + > +- clocks: A list of phandle + clock-specifier pairs for the > + clocks listed in clock-names > +- clock-names: Should contain the following: > + "phy" USB PHY reference clock > + "core" Protocol engine clock > + "iface" Interface bus clock > + "alt_core" Optional: Protocol engine clock for targets with asynchronous > + reset methodology. I'd rearrange that last entry: "alt_core": Protocol engine clock for targets with asynchronous reset methodology. (optional) > + > +- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg" If this has a default and thus isn't required, it should be listed as optional. > + > +- vdccx-supply: phandle to the regulator for the vdd supply for > + digital circuit operation. > +- v1p8-supply: phandle to the regulator for the 1.8V supply > +- v3p3-supply: phandle to the regulator for the 3.3V supply > + > +- qcom,otg-control: OTG control (VBUS and ID notifications) can be one of > + 1 - PHY control > + 2 - PMIC control > + 3 - User control (via debugfs) NAK. This does not seem like a description of the hardware, and given the debugfs comment is fundamentally tied to the way Linux functions today. > + > +Optional properties: > +- qcom,phy-init-sequence: PHY configuration sequence. val, reg pairs > + terminate with -1 What is this? I'm really not keen on having arbitrary register/memory poking sequences in the dt. Why does it need to be terminated? Surely the size of the property tells you that it's terminated. > + > +Example HSUSB OTG controller device node: > + > + usb@f9a55000 { > + compatible = "qcom,usb-otg-snps"; > + reg = <0xf9a55000 0x400>; > + interrupts = <0 134 0>;; s/;;/;/ > + dr_mode = "peripheral"; > + > + clocks = <&gcc GCC_XO_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>, > + <&gcc GCC_USB_HS_AHB_CLK>; > + > + clock-names = "phy", "core", "iface"; > + > + vddcx-supply = <&pm8841_s2_corner>; > + v1p8-supply = <&pm8941_l6>; > + v3p3-supply = <&pm8941_l24>; > + > + qcom,otg-control = <1>; > + qcom,phy-init-sequence = <0x01 0x90 0xffffffff>; I believe modern dtc versions can handle negative numbers directly. [...] > +static int msm_otg_read_dt(struct platform_device *pdev, struct msm_otg *motg) > +{ > + struct msm_otg_platform_data *pdata; > + const struct of_device_id *id; > + struct device_node *node = pdev->dev.of_node; > + int len = 0; > + u32 val; > + > + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); > + if (!pdata) > + return -ENOMEM; > + > + motg->pdata = pdata; > + > + id = of_match_device(msm_otg_dt_match, &pdev->dev); > + pdata->phy_type = (int) id->data; > + > + pdata->mode = of_usb_get_dr_mode(node); > + if (pdata->mode == USB_DR_MODE_UNKNOWN) > + pdata->mode = USB_DR_MODE_OTG; > + > + pdata->otg_control = OTG_PHY_CONTROL; > + if (!of_property_read_u32(node, "qcom,otg-control", &val)) > + pdata->otg_control = val; Is this validated elsewhere? Thanks, Mark. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Mark, On Fri, 2013-11-15 at 16:38 +0000, Mark Rutland wrote: > On Tue, Nov 12, 2013 at 02:51:45PM +0000, Ivan T. Ivanov wrote: > > From: "Ivan T. Ivanov" <iivanov@mm-sol.com> > > > > Allows MSM OTG controller to be specified via device tree. > > > > Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> > > Cc: devicetree@vger.kernel.org > > --- > > .../devicetree/bindings/usb/msm-hsusb.txt | 57 +++++++++++++- > > drivers/usb/phy/phy-msm-usb.c | 79 +++++++++++++++++--- > > 2 files changed, 124 insertions(+), 12 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt > > index 0a85eba..f1045e3 100644 > > --- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt > > +++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt > > @@ -30,4 +30,59 @@ Required properties: > > dr_mode = "peripheral"; > > interrupts = <0 134 0>; > > usb-phy = <&usb_otg>; > > - }; > > \ No newline at end of file > > + }; > > + > > +USB PHY with optional OTG: > > + > > +Required properties: > > +- compatible: should contain "qcom,usb-otg-ci" for chipsets with > > + Chipidea 45nm PHY or "qcom,usb-otg-snps" for chipsets > > + with Synopsys 28nm PHY > > To make this easier to read and extend in future, I'd reorganise this > like so: > > compatible: should contain: > * "qcom,usb-otg-ci" for chipsets with Chipidea 45nm PHY > * "qcom,usb-otg-snps" for chipsets with Synopsys 28nm PHY Ok. > > > +- regs: offset and length of the register set in the memory map > > +- interrupts: interrupt-specifier for the OTG interrupt. > > + > > +- clocks: A list of phandle + clock-specifier pairs for the > > + clocks listed in clock-names > > +- clock-names: Should contain the following: > > + "phy" USB PHY reference clock > > + "core" Protocol engine clock > > + "iface" Interface bus clock > > + "alt_core" Optional: Protocol engine clock for targets with asynchronous > > + reset methodology. > > I'd rearrange that last entry: > > "alt_core": Protocol engine clock for targets with asynchronous > reset methodology. (optional) ok. > > > + > > +- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg" > > If this has a default and thus isn't required, it should be listed as > optional. This is part of the standard USB bindings, Perhaps I could just refer to: Documentation/devicetree/bindings/usb/generic.txt > > > + > > +- vdccx-supply: phandle to the regulator for the vdd supply for > > + digital circuit operation. > > +- v1p8-supply: phandle to the regulator for the 1.8V supply > > +- v3p3-supply: phandle to the regulator for the 3.3V supply > > + > > +- qcom,otg-control: OTG control (VBUS and ID notifications) can be one of > > + 1 - PHY control > > + 2 - PMIC control > > + 3 - User control (via debugfs) > > NAK. This does not seem like a description of the hardware, and given > the debugfs comment is fundamentally tied to the way Linux functions > today. I will remove option 3, but rest are really property of the chipset. > > > + > > +Optional properties: > > +- qcom,phy-init-sequence: PHY configuration sequence. val, reg pairs > > + terminate with -1 > > What is this? I'm really not keen on having arbitrary register/memory > poking sequences in the dt. This is related Device Mode Eye Diagram test and values used could be different between chipsets. > > Why does it need to be terminated? Surely the size of the property tells > you that it's terminated. Yes. -1 termination could be done in driver. > > > + > > +Example HSUSB OTG controller device node: > > + > > + usb@f9a55000 { > > + compatible = "qcom,usb-otg-snps"; > > + reg = <0xf9a55000 0x400>; > > + interrupts = <0 134 0>;; > > s/;;/;/ thanks > > > + dr_mode = "peripheral"; > > + > > + clocks = <&gcc GCC_XO_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>, > > + <&gcc GCC_USB_HS_AHB_CLK>; > > + > > + clock-names = "phy", "core", "iface"; > > + > > + vddcx-supply = <&pm8841_s2_corner>; > > + v1p8-supply = <&pm8941_l6>; > > + v3p3-supply = <&pm8941_l24>; > > + > > + qcom,otg-control = <1>; > > + qcom,phy-init-sequence = <0x01 0x90 0xffffffff>; > > I believe modern dtc versions can handle negative numbers directly. > > [...] > > > +static int msm_otg_read_dt(struct platform_device *pdev, struct msm_otg *motg) > > +{ > > + struct msm_otg_platform_data *pdata; > > + const struct of_device_id *id; > > + struct device_node *node = pdev->dev.of_node; > > + int len = 0; > > + u32 val; > > + > > + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); > > + if (!pdata) > > + return -ENOMEM; > > + > > + motg->pdata = pdata; > > + > > + id = of_match_device(msm_otg_dt_match, &pdev->dev); > > + pdata->phy_type = (int) id->data; > > + > > + pdata->mode = of_usb_get_dr_mode(node); > > + if (pdata->mode == USB_DR_MODE_UNKNOWN) > > + pdata->mode = USB_DR_MODE_OTG; > > + > > + pdata->otg_control = OTG_PHY_CONTROL; > > + if (!of_property_read_u32(node, "qcom,otg-control", &val)) > > + pdata->otg_control = val; > > Is this validated elsewhere? No. I will add check. Thanks. Ivan > > Thanks, > Mark. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Nov 18, 2013 at 12:54:37PM +0000, Ivan T. Ivanov wrote: > Hi Mark, > > On Fri, 2013-11-15 at 16:38 +0000, Mark Rutland wrote: > > On Tue, Nov 12, 2013 at 02:51:45PM +0000, Ivan T. Ivanov wrote: > > > From: "Ivan T. Ivanov" <iivanov@mm-sol.com> > > > > > > Allows MSM OTG controller to be specified via device tree. > > > > > > Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> > > > Cc: devicetree@vger.kernel.org > > > --- > > > .../devicetree/bindings/usb/msm-hsusb.txt | 57 +++++++++++++- > > > drivers/usb/phy/phy-msm-usb.c | 79 +++++++++++++++++--- > > > 2 files changed, 124 insertions(+), 12 deletions(-) [...] > > > + > > > +- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg" > > > > If this has a default and thus isn't required, it should be listed as > > optional. > > This is part of the standard USB bindings, Perhaps I could just > refer to: Documentation/devicetree/bindings/usb/generic.txt That would be fine, but it should also be moved to the optional properties section. > > > > > > > + > > > +- vdccx-supply: phandle to the regulator for the vdd supply for > > > + digital circuit operation. > > > +- v1p8-supply: phandle to the regulator for the 1.8V supply > > > +- v3p3-supply: phandle to the regulator for the 3.3V supply > > > + > > > +- qcom,otg-control: OTG control (VBUS and ID notifications) can be one of > > > + 1 - PHY control > > > + 2 - PMIC control > > > + 3 - User control (via debugfs) > > > > NAK. This does not seem like a description of the hardware, and given > > the debugfs comment is fundamentally tied to the way Linux functions > > today. > > I will remove option 3, but rest are really property of the chipset. Can you elaborate on the diffence please? > > > > > > + > > > +Optional properties: > > > +- qcom,phy-init-sequence: PHY configuration sequence. val, reg pairs > > > + terminate with -1 > > > > What is this? I'm really not keen on having arbitrary register/memory > > poking sequences in the dt. > > This is related Device Mode Eye Diagram test and values used could be > different between chipsets. Ok. Then we should encode the tuning data rather than adding a mechanism to allow for writes to arbitrary addresses. > > > > > Why does it need to be terminated? Surely the size of the property tells > > you that it's terminated. > > Yes. -1 termination could be done in driver. Please do. There's no need for it to be in the DT. Cheers, Mark. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, On Thu, 2013-12-05 at 10:41 +0000, Mark Rutland wrote: > On Mon, Nov 18, 2013 at 12:54:37PM +0000, Ivan T. Ivanov wrote: > > Hi Mark, > > > > On Fri, 2013-11-15 at 16:38 +0000, Mark Rutland wrote: > > > On Tue, Nov 12, 2013 at 02:51:45PM +0000, Ivan T. Ivanov wrote: > > > > From: "Ivan T. Ivanov" <iivanov@mm-sol.com> > > > > > > > > Allows MSM OTG controller to be specified via device tree. > > > > > > > > Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> > > > > Cc: devicetree@vger.kernel.org > > > > --- > > > > .../devicetree/bindings/usb/msm-hsusb.txt | 57 +++++++++++++- > > > > drivers/usb/phy/phy-msm-usb.c | 79 +++++++++++++++++--- > > > > 2 files changed, 124 insertions(+), 12 deletions(-) > > [...] > > > > > + > > > > +- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg" > > > > > > If this has a default and thus isn't required, it should be listed as > > > optional. > > > > This is part of the standard USB bindings, Perhaps I could just > > refer to: Documentation/devicetree/bindings/usb/generic.txt > > That would be fine, but it should also be moved to the optional > properties section. Ok. > > > > > > > > > > > > + > > > > +- vdccx-supply: phandle to the regulator for the vdd supply for > > > > + digital circuit operation. > > > > +- v1p8-supply: phandle to the regulator for the 1.8V supply > > > > +- v3p3-supply: phandle to the regulator for the 3.3V supply > > > > + > > > > +- qcom,otg-control: OTG control (VBUS and ID notifications) can be one of > > > > + 1 - PHY control > > > > + 2 - PMIC control > > > > + 3 - User control (via debugfs) > > > > > > NAK. This does not seem like a description of the hardware, and given > > > the debugfs comment is fundamentally tied to the way Linux functions > > > today. > > > > I will remove option 3, but rest are really property of the chipset. > > Can you elaborate on the diffence please? Difference is how VBUS, ID changes, Accessory and Charger detection is handled. In older chips-sets they are handled by PHY controller, while now they are handled by external PMIC logic. > > > > > > > > > > + > > > > +Optional properties: > > > > +- qcom,phy-init-sequence: PHY configuration sequence. val, reg pairs > > > > + terminate with -1 > > > > > > What is this? I'm really not keen on having arbitrary register/memory > > > poking sequences in the dt. > > > > This is related Device Mode Eye Diagram test and values used could be > > different between chipsets. > > Ok. Then we should encode the tuning data rather than adding a mechanism > to allow for writes to arbitrary addresses. Currently: for msm8226 sequence is < 0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 > for msm8974 sequence is < 0x63 0x81 > I could reserve -1 as "do not program" value and document that values in this array will be written to ULPI interface with ULPI_EXT_VENDOR_SPECIFIC as base address. for msm8974 sequence will be < -1 0x63 > > > > > > > > > > Why does it need to be terminated? Surely the size of the property tells > > > you that it's terminated. > > > > Yes. -1 termination could be done in driver. > > Please do. There's no need for it to be in the DT. Thanks. Ivan > > Cheers, > Mark. > -- > To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt index 0a85eba..f1045e3 100644 --- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt +++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt @@ -30,4 +30,59 @@ Required properties: dr_mode = "peripheral"; interrupts = <0 134 0>; usb-phy = <&usb_otg>; - }; \ No newline at end of file + }; + +USB PHY with optional OTG: + +Required properties: +- compatible: should contain "qcom,usb-otg-ci" for chipsets with + Chipidea 45nm PHY or "qcom,usb-otg-snps" for chipsets + with Synopsys 28nm PHY +- regs: offset and length of the register set in the memory map +- interrupts: interrupt-specifier for the OTG interrupt. + +- clocks: A list of phandle + clock-specifier pairs for the + clocks listed in clock-names +- clock-names: Should contain the following: + "phy" USB PHY reference clock + "core" Protocol engine clock + "iface" Interface bus clock + "alt_core" Optional: Protocol engine clock for targets with asynchronous + reset methodology. + +- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg" + +- vdccx-supply: phandle to the regulator for the vdd supply for + digital circuit operation. +- v1p8-supply: phandle to the regulator for the 1.8V supply +- v3p3-supply: phandle to the regulator for the 3.3V supply + +- qcom,otg-control: OTG control (VBUS and ID notifications) can be one of + 1 - PHY control + 2 - PMIC control + 3 - User control (via debugfs) + +Optional properties: +- qcom,phy-init-sequence: PHY configuration sequence. val, reg pairs + terminate with -1 + +Example HSUSB OTG controller device node: + + usb@f9a55000 { + compatible = "qcom,usb-otg-snps"; + reg = <0xf9a55000 0x400>; + interrupts = <0 134 0>;; + dr_mode = "peripheral"; + + clocks = <&gcc GCC_XO_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>, + <&gcc GCC_USB_HS_AHB_CLK>; + + clock-names = "phy", "core", "iface"; + + vddcx-supply = <&pm8841_s2_corner>; + v1p8-supply = <&pm8941_l6>; + v3p3-supply = <&pm8941_l24>; + + qcom,otg-control = <1>; + qcom,phy-init-sequence = <0x01 0x90 0xffffffff>; + }; diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c index fa8e672d..cc230c8 100644 --- a/drivers/usb/phy/phy-msm-usb.c +++ b/drivers/usb/phy/phy-msm-usb.c @@ -30,9 +30,12 @@ #include <linux/debugfs.h> #include <linux/seq_file.h> #include <linux/pm_runtime.h> +#include <linux/of.h> +#include <linux/of_device.h> #include <linux/usb.h> #include <linux/usb/otg.h> +#include <linux/usb/of.h> #include <linux/usb/ulpi.h> #include <linux/usb/gadget.h> #include <linux/usb/hcd.h> @@ -1343,25 +1346,75 @@ static void msm_otg_debugfs_cleanup(void) debugfs_remove(msm_otg_dbg_root); } +static struct of_device_id msm_otg_dt_match[] = { + { + .compatible = "qcom,usb-otg-ci", + .data = (void *) CI_45NM_INTEGRATED_PHY + }, { + .compatible = "qcom,usb-otg-snps", + .data = (void *) SNPS_28NM_INTEGRATED_PHY + }, {} +}; + +static int msm_otg_read_dt(struct platform_device *pdev, struct msm_otg *motg) +{ + struct msm_otg_platform_data *pdata; + const struct of_device_id *id; + struct device_node *node = pdev->dev.of_node; + int len = 0; + u32 val; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + motg->pdata = pdata; + + id = of_match_device(msm_otg_dt_match, &pdev->dev); + pdata->phy_type = (int) id->data; + + pdata->mode = of_usb_get_dr_mode(node); + if (pdata->mode == USB_DR_MODE_UNKNOWN) + pdata->mode = USB_DR_MODE_OTG; + + pdata->otg_control = OTG_PHY_CONTROL; + if (!of_property_read_u32(node, "qcom,otg-control", &val)) + pdata->otg_control = val; + + if (!of_get_property(node, "qcom,phy-init-sequence", &len) || !len) + return 0; + + pdata->phy_init_seq = devm_kzalloc(&pdev->dev, len, GFP_KERNEL); + if (!pdata->phy_init_seq) + return 0; + + of_property_read_u32_array(node, "qcom,phy-init-sequence", + pdata->phy_init_seq, + len / sizeof(*pdata->phy_init_seq)); + return 0; +} + static int __init msm_otg_probe(struct platform_device *pdev) { int ret = 0; + struct device_node *np = pdev->dev.of_node; + struct msm_otg_platform_data *pdata; struct resource *res; struct msm_otg *motg; struct usb_phy *phy; - dev_info(&pdev->dev, "msm_otg probe\n"); - if (!dev_get_platdata(&pdev->dev)) { - dev_err(&pdev->dev, "No platform data given. Bailing out\n"); - return -ENODEV; - } - motg = devm_kzalloc(&pdev->dev, sizeof(struct msm_otg), GFP_KERNEL); if (!motg) { dev_err(&pdev->dev, "unable to allocate msm_otg\n"); return -ENOMEM; } + pdata = dev_get_platdata(&pdev->dev); + if (!pdata) + ret = msm_otg_read_dt(pdev, motg); + if (ret) + return ret; + motg->phy.otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg), GFP_KERNEL); if (!motg->phy.otg) { @@ -1369,17 +1422,17 @@ static int __init msm_otg_probe(struct platform_device *pdev) return -ENOMEM; } - motg->pdata = dev_get_platdata(&pdev->dev); phy = &motg->phy; phy->dev = &pdev->dev; - motg->phy_reset_clk = devm_clk_get(&pdev->dev, "usb_phy_clk"); + motg->phy_reset_clk = devm_clk_get(&pdev->dev, + np ? "phy" : "usb_phy_clk"); if (IS_ERR(motg->phy_reset_clk)) { dev_err(&pdev->dev, "failed to get usb_phy_clk\n"); return PTR_ERR(motg->phy_reset_clk); } - motg->clk = devm_clk_get(&pdev->dev, "usb_hs_clk"); + motg->clk = devm_clk_get(&pdev->dev, np ? "core" : "usb_hs_clk"); if (IS_ERR(motg->clk)) { dev_err(&pdev->dev, "failed to get usb_hs_clk\n"); return PTR_ERR(motg->clk); @@ -1391,7 +1444,7 @@ static int __init msm_otg_probe(struct platform_device *pdev) * operation and USB core cannot tolerate frequency changes on * CORE CLK. */ - motg->pclk = devm_clk_get(&pdev->dev, "usb_hs_pclk"); + motg->pclk = devm_clk_get(&pdev->dev, np ? "iface" : "usb_hs_pclk"); if (IS_ERR(motg->pclk)) { dev_err(&pdev->dev, "failed to get usb_hs_pclk\n"); return PTR_ERR(motg->pclk); @@ -1402,7 +1455,8 @@ static int __init msm_otg_probe(struct platform_device *pdev) * clock is introduced to remove the dependency on AXI * bus frequency. */ - motg->core_clk = devm_clk_get(&pdev->dev, "usb_hs_core_clk"); + motg->core_clk = devm_clk_get(&pdev->dev, + np ? "alt_core" : "usb_hs_core_clk"); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); motg->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res)); @@ -1639,6 +1693,8 @@ static const struct dev_pm_ops msm_otg_dev_pm_ops = { }; #endif +MODULE_DEVICE_TABLE(of, msm_otg_dt_match); + static struct platform_driver msm_otg_driver = { .probe = msm_otg_probe, .remove = msm_otg_remove, @@ -1648,6 +1704,7 @@ static struct platform_driver msm_otg_driver = { #ifdef CONFIG_PM .pm = &msm_otg_dev_pm_ops, #endif + .of_match_table = msm_otg_dt_match, }, };