Message ID | 1383717824-19157-1-git-send-email-jilin@nvidia.com |
---|---|
State | Accepted |
Delegated to: | Tom Warren |
Headers | show |
On 11/05/2013 11:03 PM, Jim Lin wrote: > Fix the timeout issue after running "bootp" command in u-boot > console. For example you see "EHCI timed out on TD- token=0x...". > TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 > after a controller reset and before RUN bit is set > (per technical reference manual). Tested-by: Stephen Warren <swarren@nvidia.com> (I wasn't experiencing any time-out issues myself on those platforms, but everything certainly still works fine after this patch)
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index c3de9a9..a4e8a5f 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -82,5 +82,6 @@ /* For USB EHCI controller */ #define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 #endif /* _TEGRA114_COMMON_H_ */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 99acbfd..b5550d7 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -79,5 +79,6 @@ /* For USB EHCI controller */ #define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 #endif /* _TEGRA30_COMMON_H_ */
Fix the timeout issue after running "bootp" command in u-boot console. For example you see "EHCI timed out on TD- token=0x...". TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a controller reset and before RUN bit is set (per technical reference manual). Signed-off-by: Jim Lin <jilin@nvidia.com> --- include/configs/tegra114-common.h | 1 + include/configs/tegra30-common.h | 1 + 2 files changed, 2 insertions(+), 0 deletions(-)