| Message ID | 20240704053651.1100732-4-clg@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | aspeed: Add boot from eMMC support (AST2600) | expand |
On Thu, 2024-07-04 at 07:36 +0200, Cédric Le Goater wrote: > From: Cédric Le Goater <clg@kaod.org> > > Bit SCU500[2] of the AST2600 controls the boot device of the SoC. > > Future changes will configure this bit to boot from eMMC disk images > specially built for this purpose. > > Signed-off-by: Joel Stanley <joel@jms.id.au> > Signed-off-by: Cédric Le Goater <clg@kaod.org> > --- > include/hw/misc/aspeed_scu.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h > index 58db28db45aa..c9f98c20ffd9 100644 > --- a/include/hw/misc/aspeed_scu.h > +++ b/include/hw/misc/aspeed_scu.h > @@ -349,6 +349,10 @@ uint32_t aspeed_scu_get_apb_freq(AspeedSCUState *s); > #define SCU_AST2600_H_PLL_BYPASS_EN (0x1 << 24) > #define SCU_AST2600_H_PLL_OFF (0x1 << 23) > > +/* STRAP1 SCU500 */ > +#define AST2600_HW_STRAP_BOOT_SRC_EMMC (0x1 << 2) > +#define AST2600_HW_STRAP_BOOT_SRC_SPI (0x0 << 2) Maybe these should have a `SCU_` prefix for consistency? Anyway: Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
On 7/5/24 5:36 AM, Andrew Jeffery wrote: > On Thu, 2024-07-04 at 07:36 +0200, Cédric Le Goater wrote: >> From: Cédric Le Goater <clg@kaod.org> >> >> Bit SCU500[2] of the AST2600 controls the boot device of the SoC. >> >> Future changes will configure this bit to boot from eMMC disk images >> specially built for this purpose. >> >> Signed-off-by: Joel Stanley <joel@jms.id.au> >> Signed-off-by: Cédric Le Goater <clg@kaod.org> >> --- >> include/hw/misc/aspeed_scu.h | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h >> index 58db28db45aa..c9f98c20ffd9 100644 >> --- a/include/hw/misc/aspeed_scu.h >> +++ b/include/hw/misc/aspeed_scu.h >> @@ -349,6 +349,10 @@ uint32_t aspeed_scu_get_apb_freq(AspeedSCUState *s); >> #define SCU_AST2600_H_PLL_BYPASS_EN (0x1 << 24) >> #define SCU_AST2600_H_PLL_OFF (0x1 << 23) >> >> +/* STRAP1 SCU500 */ >> +#define AST2600_HW_STRAP_BOOT_SRC_EMMC (0x1 << 2) >> +#define AST2600_HW_STRAP_BOOT_SRC_SPI (0x0 << 2) > > Maybe these should have a `SCU_` prefix for consistency? Yep. I agree. > Anyway: > > Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> > Thanks, C.
diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h index 58db28db45aa..c9f98c20ffd9 100644 --- a/include/hw/misc/aspeed_scu.h +++ b/include/hw/misc/aspeed_scu.h @@ -349,6 +349,10 @@ uint32_t aspeed_scu_get_apb_freq(AspeedSCUState *s); #define SCU_AST2600_H_PLL_BYPASS_EN (0x1 << 24) #define SCU_AST2600_H_PLL_OFF (0x1 << 23) +/* STRAP1 SCU500 */ +#define AST2600_HW_STRAP_BOOT_SRC_EMMC (0x1 << 2) +#define AST2600_HW_STRAP_BOOT_SRC_SPI (0x0 << 2) + /* * SCU310 Clock Selection Register Set 4 (for Aspeed AST1030 SOC) *