diff mbox series

[v2,8/9] pwm: lpss: Add a comment to the bypass field

Message ID 20220908135658.64463-9-andriy.shevchenko@linux.intel.com
State Changes Requested
Headers show
Series pwm: lpss: Clean up and convert to a pure library | expand

Commit Message

Andy Shevchenko Sept. 8, 2022, 1:56 p.m. UTC
Add a comment to the bypass field based on the commit b997e3edca4f
("pwm: lpss: Set enable-bit before waiting for update-bit
to go low").

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/pwm/pwm-lpss.h | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Uwe Kleine-König Sept. 24, 2022, 10:09 a.m. UTC | #1
On Thu, Sep 08, 2022 at 04:56:57PM +0300, Andy Shevchenko wrote:
> Add a comment to the bypass field based on the commit b997e3edca4f
> ("pwm: lpss: Set enable-bit before waiting for update-bit
> to go low").
> 
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

Looks good, added Hans (i.e. the author of b997e3edca4f) to Cc.

Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

thanks
Uwe
diff mbox series

Patch

diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h
index 839622964b2a..0249c01befd5 100644
--- a/drivers/pwm/pwm-lpss.h
+++ b/drivers/pwm/pwm-lpss.h
@@ -29,6 +29,11 @@  struct pwm_lpss_boardinfo {
 	unsigned long clk_rate;
 	unsigned int npwm;
 	unsigned long base_unit_bits;
+	/*
+	 * Some versions of the IP may stuck in the state machine if enable
+	 * bit is not set, and hence update bit will show busy status till
+	 * the reset. For the rest it may be otherwise.
+	 */
 	bool bypass;
 	/*
 	 * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device