diff mbox series

[i386] Fix typo in <code>v1ti3.

Message ID 20220223092126.78821-1-hongtao.liu@intel.com
State New
Headers show
Series [i386] Fix typo in <code>v1ti3. | expand

Commit Message

liuhongt Feb. 23, 2022, 9:21 a.m. UTC
For evex encoding vp{xor,or,and}, suffix is needed.

Or there would be an error for
vpxor %ymm0, %ymm31, %ymm1

Error: unsupported instruction `vpxor'

Bootstrapped and regtested x86_64-pc-linux-gnu{-m32,}.
Pushed to trunk.

gcc/ChangeLog:

	* config/i386/sse.md (<code>v1ti3): Add suffix and replace
	isa attr of alternative 2 from avx to avx512vl.
---
 gcc/config/i386/sse.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Jakub Jelinek Feb. 23, 2022, 9:45 a.m. UTC | #1
On Wed, Feb 23, 2022 at 05:21:26PM +0800, liuhongt via Gcc-patches wrote:
> For evex encoding vp{xor,or,and}, suffix is needed.
> 
> Or there would be an error for
> vpxor %ymm0, %ymm31, %ymm1

The insn is about V1TImode, so the error would be on
vpxor %xmm0, %xmm31, %xmm1

> 
> Error: unsupported instruction `vpxor'
> 
> Bootstrapped and regtested x86_64-pc-linux-gnu{-m32,}.
> Pushed to trunk.
> 
> gcc/ChangeLog:
> 
> 	* config/i386/sse.md (<code>v1ti3): Add suffix and replace
> 	isa attr of alternative 2 from avx to avx512vl.

The patch looks good, but I think it would be nice to have a dg-do assemble
testcase for it.
Something like untested:
/* { dg-do assemble { target { int128 && avx512vl } } } */
/* { dg-options "-O2 -mavx512vl" } */

typedef __int128 V __attribute__((vector_size (16)));

void
foo (V *x, V *y, V *z)
{
  register V a __asm ("xmm31") = *z;
  __asm ("" : "+v" (a));
  x[0] = y[0] & a;
  x[1] = y[1] | a;
  x[2] = y[2] ^ a;
}

	Jakub
Hongtao Liu Feb. 23, 2022, 10:04 a.m. UTC | #2
On Wed, Feb 23, 2022 at 5:48 PM Jakub Jelinek via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> On Wed, Feb 23, 2022 at 05:21:26PM +0800, liuhongt via Gcc-patches wrote:
> > For evex encoding vp{xor,or,and}, suffix is needed.
> >
> > Or there would be an error for
> > vpxor %ymm0, %ymm31, %ymm1
>
> The insn is about V1TImode, so the error would be on
> vpxor %xmm0, %xmm31, %xmm1
>
> >
> > Error: unsupported instruction `vpxor'
> >
> > Bootstrapped and regtested x86_64-pc-linux-gnu{-m32,}.
> > Pushed to trunk.
> >
> > gcc/ChangeLog:
> >
> >       * config/i386/sse.md (<code>v1ti3): Add suffix and replace
> >       isa attr of alternative 2 from avx to avx512vl.
>
> The patch looks good, but I think it would be nice to have a dg-do assemble
> testcase for it.
Yes will add.
> Something like untested:
> /* { dg-do assemble { target { int128 && avx512vl } } } */
> /* { dg-options "-O2 -mavx512vl" } */
>
> typedef __int128 V __attribute__((vector_size (16)));
>
> void
> foo (V *x, V *y, V *z)
> {
>   register V a __asm ("xmm31") = *z;
>   __asm ("" : "+v" (a));
>   x[0] = y[0] & a;
>   x[1] = y[1] | a;
>   x[2] = y[2] ^ a;
> }
>
>         Jakub
>
diff mbox series

Patch

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index b2f56345c65..3066ea3734a 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -17025,8 +17025,8 @@  (define_insn "<code>v1ti3"
   "@
    p<logic>\t{%2, %0|%0, %2}
    vp<logic>\t{%2, %1, %0|%0, %1, %2}
-   vp<logic>\t{%2, %1, %0|%0, %1, %2}"
-  [(set_attr "isa" "noavx,avx,avx")
+   vp<logic>d\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "isa" "noavx,avx,avx512vl")
    (set_attr "prefix" "orig,vex,evex")
    (set_attr "prefix_data16" "1,*,*")
    (set_attr "type" "sselog")