| Message ID | 20210619092006.646929-1-icenowy@aosc.io |
|---|---|
| State | Accepted |
| Delegated to: | Andre Przywara |
| Headers | show |
| Series | mkimage: sunxi_egon: add riscv support | expand |
On Sat, 19 Jun 2021 17:20:04 +0800 Icenowy Zheng <icenowy@aosc.io> wrote: > Refactor some functions in mkimage sunxi_egon type, in order to prepare > for adding support for more CPU architectures (e.g. RISC-V). In > addition, compatibility for operation w/o specified architecture is > kept, in this case the architecture is assumed as ARM. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Looks alright: Reviewed-by: Andre Przywara <andre.przywara@arm.com> One thing you might want to improve (just when you respin anyway): > --- > Changes in v2: > - Merged fixes in the next patch in v1 (patch rebase issue). > > tools/sunxi_egon.c | 63 ++++++++++++++++++++++++++++++++++++++++------ > 1 file changed, 56 insertions(+), 7 deletions(-) > > diff --git a/tools/sunxi_egon.c b/tools/sunxi_egon.c > index a5299eb6a1..062c9bc151 100644 > --- a/tools/sunxi_egon.c > +++ b/tools/sunxi_egon.c > @@ -16,7 +16,25 @@ > > static int egon_check_params(struct image_tool_params *params) > { > - /* We just need a binary image file. */ > + int arch; > + > + /* Assume ARM when no architecture specified for compatibility */ > + if (params->Aflag) > + arch = params->arch; > + else > + arch = IH_ARCH_ARM; This code snippet will be used three times in this file, so you might want to factor this out. Cheers, Andre > + > + /* > + * Check whether the architecture is supported. > + */ > + switch (arch) { > + case IH_ARCH_ARM: > + break; > + default: > + return EXIT_FAILURE; > + } > + > + /* We need a binary image file. */ > return !params->dflag; > } > > @@ -25,10 +43,26 @@ static int egon_verify_header(unsigned char *ptr, int image_size, > { > const struct boot_file_head *header = (void *)ptr; > uint32_t length; > + int arch; > > - /* First 4 bytes must be an ARM branch instruction. */ > - if ((le32_to_cpu(header->b_instruction) & 0xff000000) != 0xea000000) > - return EXIT_FAILURE; > + /* Assume ARM when no architecture specified for compatibility */ > + if (params->Aflag) > + arch = params->arch; > + else > + arch = IH_ARCH_ARM; > + > + /* > + * First 4 bytes must be a branch instruction of the corresponding > + * architecture. > + */ > + switch (arch) { > + case IH_ARCH_ARM: > + if ((le32_to_cpu(header->b_instruction) & 0xff000000) != 0xea000000) > + return EXIT_FAILURE; > + break; > + default: > + return EXIT_FAILURE; /* Unknown architecture */ > + } > > if (memcmp(header->magic, BOOT0_MAGIC, sizeof(header->magic))) > return EXIT_FAILURE; > @@ -76,10 +110,25 @@ static void egon_set_header(void *buf, struct stat *sbuf, int infd, > uint32_t *buf32 = buf; > uint32_t checksum = 0, value; > int i; > + int arch; > > - /* Generate an ARM branch instruction to jump over the header. */ > - value = 0xea000000 | (sizeof(struct boot_file_head) / 4 - 2); > - header->b_instruction = cpu_to_le32(value); > + /* Assume ARM when no architecture specified for compatibility */ > + if (params->Aflag) > + arch = params->arch; > + else > + arch = IH_ARCH_ARM; > + > + /* > + * Different architectures need different first instruction to > + * branch to the body. > + */ > + switch (arch) { > + case IH_ARCH_ARM: > + /* Generate an ARM branch instruction to jump over the header. */ > + value = 0xea000000 | (sizeof(struct boot_file_head) / 4 - 2); > + header->b_instruction = cpu_to_le32(value); > + break; > + } > > memcpy(header->magic, BOOT0_MAGIC, sizeof(header->magic)); > header->check_sum = cpu_to_le32(BROM_STAMP_VALUE);
diff --git a/tools/sunxi_egon.c b/tools/sunxi_egon.c index a5299eb6a1..062c9bc151 100644 --- a/tools/sunxi_egon.c +++ b/tools/sunxi_egon.c @@ -16,7 +16,25 @@ static int egon_check_params(struct image_tool_params *params) { - /* We just need a binary image file. */ + int arch; + + /* Assume ARM when no architecture specified for compatibility */ + if (params->Aflag) + arch = params->arch; + else + arch = IH_ARCH_ARM; + + /* + * Check whether the architecture is supported. + */ + switch (arch) { + case IH_ARCH_ARM: + break; + default: + return EXIT_FAILURE; + } + + /* We need a binary image file. */ return !params->dflag; } @@ -25,10 +43,26 @@ static int egon_verify_header(unsigned char *ptr, int image_size, { const struct boot_file_head *header = (void *)ptr; uint32_t length; + int arch; - /* First 4 bytes must be an ARM branch instruction. */ - if ((le32_to_cpu(header->b_instruction) & 0xff000000) != 0xea000000) - return EXIT_FAILURE; + /* Assume ARM when no architecture specified for compatibility */ + if (params->Aflag) + arch = params->arch; + else + arch = IH_ARCH_ARM; + + /* + * First 4 bytes must be a branch instruction of the corresponding + * architecture. + */ + switch (arch) { + case IH_ARCH_ARM: + if ((le32_to_cpu(header->b_instruction) & 0xff000000) != 0xea000000) + return EXIT_FAILURE; + break; + default: + return EXIT_FAILURE; /* Unknown architecture */ + } if (memcmp(header->magic, BOOT0_MAGIC, sizeof(header->magic))) return EXIT_FAILURE; @@ -76,10 +110,25 @@ static void egon_set_header(void *buf, struct stat *sbuf, int infd, uint32_t *buf32 = buf; uint32_t checksum = 0, value; int i; + int arch; - /* Generate an ARM branch instruction to jump over the header. */ - value = 0xea000000 | (sizeof(struct boot_file_head) / 4 - 2); - header->b_instruction = cpu_to_le32(value); + /* Assume ARM when no architecture specified for compatibility */ + if (params->Aflag) + arch = params->arch; + else + arch = IH_ARCH_ARM; + + /* + * Different architectures need different first instruction to + * branch to the body. + */ + switch (arch) { + case IH_ARCH_ARM: + /* Generate an ARM branch instruction to jump over the header. */ + value = 0xea000000 | (sizeof(struct boot_file_head) / 4 - 2); + header->b_instruction = cpu_to_le32(value); + break; + } memcpy(header->magic, BOOT0_MAGIC, sizeof(header->magic)); header->check_sum = cpu_to_le32(BROM_STAMP_VALUE);
Refactor some functions in mkimage sunxi_egon type, in order to prepare for adding support for more CPU architectures (e.g. RISC-V). In addition, compatibility for operation w/o specified architecture is kept, in this case the architecture is assumed as ARM. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- Changes in v2: - Merged fixes in the next patch in v1 (patch rebase issue). tools/sunxi_egon.c | 63 ++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 56 insertions(+), 7 deletions(-)