Message ID | 20210604055113.3630286-4-bmeng.cn@gmail.com |
---|---|
State | Accepted |
Commit | 048aff6d2621df2654dce6f833a2cf843358486a |
Delegated to: | Andes |
Headers | show |
Series | [1/5] riscv: ae350: dts: Add SPDX license header | expand |
> From: Bin Meng <bmeng.cn@gmail.com> > Sent: Friday, June 04, 2021 1:51 PM > To: Rick Jian-Zhi Chen(陳建志) <rick@andestech.com>; Leo Yu-Chi Liang(梁育齊) <ycliang@andestech.com>; U-Boot Mailing List <u-boot@lists.denx.de> > Subject: [PATCH 4/5] riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit > > All the device nodes that refer to plic0 as their interrupt parent have 2 cells encoded in their interrupts property, but plic0 only provides 1 cell in #interrupt-cells which is incorrect. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > --- > > arch/riscv/dts/ae350_32.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rick Chen <rick@andestech.com>
On Fri, Jun 04, 2021 at 01:51:12PM +0800, Bin Meng wrote: > All the device nodes that refer to plic0 as their interrupt parent > have 2 cells encoded in their interrupts property, but plic0 only > provides 1 cell in #interrupt-cells which is incorrect. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > --- > > arch/riscv/dts/ae350_32.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index 0917b83108..70576846f2 100644 --- a/arch/riscv/dts/ae350_32.dts +++ b/arch/riscv/dts/ae350_32.dts @@ -135,7 +135,7 @@ plic0: interrupt-controller@e4000000 { compatible = "riscv,plic0"; - #interrupt-cells = <1>; + #interrupt-cells = <2>; interrupt-controller; reg = <0xe4000000 0x2000000>; riscv,ndev=<71>;
All the device nodes that refer to plic0 as their interrupt parent have 2 cells encoded in their interrupts property, but plic0 only provides 1 cell in #interrupt-cells which is incorrect. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- arch/riscv/dts/ae350_32.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)