| Message ID | 7b735b0c898da0db2af8628a64df2f5114596f22.1620727160.git.sathvika@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | powerpc/sstep: Add emulation support and tests for 'setb' instruction | expand |
| Related | show |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (fcc98c6d0289241dded10b74f8198fc4ecb22bd1) |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 28 lines checked |
| snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
On Tue, May 11, 2021 at 07:18:32AM -0500, Sathvika Vasireddy wrote: > This adds emulation support for the following instruction: > * Set Boolean (setb) > > Signed-off-by: Sathvika Vasireddy <sathvika@linux.vnet.ibm.com> This looks fine to me, thanks! Reviewed-by: Segher Boessenkool <segher@kernel.crashing.org> Segher
Sathvika Vasireddy wrote: > This adds emulation support for the following instruction: > * Set Boolean (setb) > > Signed-off-by: Sathvika Vasireddy <sathvika@linux.vnet.ibm.com> > --- > arch/powerpc/lib/sstep.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) Tested-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> > > diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c > index 45bda2520755..aee42bcc775b 100644 > --- a/arch/powerpc/lib/sstep.c > +++ b/arch/powerpc/lib/sstep.c > @@ -1700,6 +1700,28 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, > op->val = regs->ccr & imm; > goto compute_done; > > + case 128: /* setb */ > + if (!cpu_has_feature(CPU_FTR_ARCH_300)) > + goto unknown_opcode; > + /* > + * 'ra' encodes the CR field number (bfa) in the top 3 bits. > + * Since each CR field is 4 bits, > + * we can simply mask off the bottom two bits (bfa * 4) > + * to yield the first bit in the CR field. > + */ > + ra = ra & ~0x3; > + /* 'val' stores bits of the CR field (bfa) */ > + val = regs->ccr >> (CR0_SHIFT - ra); > + /* checks if the LT bit of CR field (bfa) is set */ > + if (val & 8) > + op->val = -1; > + /* checks if the GT bit of CR field (bfa) is set */ > + else if (val & 4) > + op->val = 1; > + else > + op->val = 0; > + goto compute_done; > + > case 144: /* mtcrf */ > op->type = COMPUTE + SETCC; > imm = 0xf0000000UL; > -- > 2.16.4 > >
On 11/05/21 5:48 pm, Sathvika Vasireddy wrote: > This adds emulation support for the following instruction: > * Set Boolean (setb) > > Signed-off-by: Sathvika Vasireddy <sathvika@linux.vnet.ibm.com> > --- > arch/powerpc/lib/sstep.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > LGTM. Reviewed-by: Sandipan Das <sandipan@linux.ibm.com>
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c index 45bda2520755..aee42bcc775b 100644 --- a/arch/powerpc/lib/sstep.c +++ b/arch/powerpc/lib/sstep.c @@ -1700,6 +1700,28 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, op->val = regs->ccr & imm; goto compute_done; + case 128: /* setb */ + if (!cpu_has_feature(CPU_FTR_ARCH_300)) + goto unknown_opcode; + /* + * 'ra' encodes the CR field number (bfa) in the top 3 bits. + * Since each CR field is 4 bits, + * we can simply mask off the bottom two bits (bfa * 4) + * to yield the first bit in the CR field. + */ + ra = ra & ~0x3; + /* 'val' stores bits of the CR field (bfa) */ + val = regs->ccr >> (CR0_SHIFT - ra); + /* checks if the LT bit of CR field (bfa) is set */ + if (val & 8) + op->val = -1; + /* checks if the GT bit of CR field (bfa) is set */ + else if (val & 4) + op->val = 1; + else + op->val = 0; + goto compute_done; + case 144: /* mtcrf */ op->type = COMPUTE + SETCC; imm = 0xf0000000UL;
This adds emulation support for the following instruction: * Set Boolean (setb) Signed-off-by: Sathvika Vasireddy <sathvika@linux.vnet.ibm.com> --- arch/powerpc/lib/sstep.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)