@@ -36,7 +36,6 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len,
- int nb_mappings,
int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3,
@@ -128,7 +128,6 @@ static void digic4_add_k8p3215uqb_rom(DigicState *s, hwaddr addr,
FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_SIZE);
qdev_prop_set_uint32(dev, "sector-length", FLASH_K8P3215UQB_SECTOR_SIZE);
qdev_prop_set_uint8(dev, "width", 4); /* 32-bit */
- qdev_prop_set_uint8(dev, "mappings", 0);
qdev_prop_set_uint8(dev, "big-endian", 0);
qdev_prop_set_uint16(dev, "id0", 0x00ec);
qdev_prop_set_uint16(dev, "id1", 0x007e);
@@ -1657,7 +1657,6 @@ static void musicpal_init(MachineState *machine)
qdev_prop_set_uint32(dev, "num-blocks", flash_size / sector_size);
qdev_prop_set_uint32(dev, "sector-length", sector_size);
qdev_prop_set_uint8(dev, "width", 2); /* 16-bit */
- qdev_prop_set_uint8(dev, "mappings", 0);
qdev_prop_set_uint8(dev, "big-endian", 0);
qdev_prop_set_uint16(dev, "id0", 0x00bf);
qdev_prop_set_uint16(dev, "id1", 0x236d);
@@ -220,7 +220,7 @@ static void zynq_init(MachineState *machine)
pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
FLASH_SECTOR_SIZE, 1,
- 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa,
+ 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa,
0);
/* Create the main clock source, and feed slcr with it */
@@ -968,7 +968,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len,
- int nb_mappings, int width,
+ int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3,
uint16_t unlock_addr0,
@@ -977,7 +977,6 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
{
DeviceState *dev = qdev_new(TYPE_PFLASH_CFI02);
- assert(nb_mappings <= 1);
if (blk) {
qdev_prop_set_drive(dev, "drive", blk);
}
@@ -121,7 +121,7 @@ static void lm32_evr_init(MachineState *machine)
pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
flash_sector_size,
- 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
+ 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
/* create irq lines */
env->pic_state = lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, cpu, 0));
@@ -218,7 +218,7 @@ static void lm32_uclinux_init(MachineState *machine)
pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
flash_sector_size,
- 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
+ 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
/* create irq lines */
env->pic_state = lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, env, 0));
@@ -198,7 +198,7 @@ static void ref405ep_init(MachineState *machine)
pflash_cfi02_register((uint32_t)(-bios_size),
"ef405ep.bios", bios_size,
blk_by_legacy_dinfo(dinfo),
- 64 * KiB, 1,
+ 64 * KiB,
2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
} else
@@ -469,7 +469,7 @@ static void taihu_405ep_init(MachineState *machine)
pflash_cfi02_register(0xFFE00000,
"taihu_405ep.bios", bios_size,
blk_by_legacy_dinfo(dinfo),
- 64 * KiB, 1,
+ 64 * KiB,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
@@ -502,7 +502,7 @@ static void taihu_405ep_init(MachineState *machine)
bios_size = 32 * MiB;
pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
blk_by_legacy_dinfo(dinfo),
- 64 * KiB, 1,
+ 64 * KiB,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
@@ -301,7 +301,7 @@ static void r2d_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, 1, 2, 0x0001, 0x227e, 0x2220, 0x2200,
+ 64 * KiB, 2, 0x0001, 0x227e, 0x2220, 0x2200,
0x555, 0x2aa, 0);
/* NIC: rtl8139 on-board, and 2 slots. */