| Message ID | 20210322075248.136255-1-bmeng.cn@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] hw/riscv: microchip_pfsoc: Map EMMC/SD mux register | expand |
On Mon, Mar 22, 2021 at 3:53 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > From: Bin Meng <bin.meng@windriver.com> > > Since HSS commit c20a89f8dcac, the Icicle Kit reference design has > been updated to use a register mapped at 0x4f000000 instead of a > GPIO to control whether eMMC or SD card is to be used. With this > support the same HSS image can be used for both eMMC and SD card > boot flow, while previously two different board configurations were > used. This is undocumented but one can take a look at the HSS code > HSS_MMCInit() in services/mmc/mmc_api.c. > > With this commit, HSS image built from 2020.12 release boots again. > > Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > > include/hw/riscv/microchip_pfsoc.h | 1 + > hw/riscv/microchip_pfsoc.c | 6 ++++++ > 2 files changed, 7 insertions(+) > > diff --git a/include/hw/riscv/microchip_pfsoc.h b/include/hw/riscv/microchip_pfsoc.h > index d0c666aae0..d30916f45d 100644 > --- a/include/hw/riscv/microchip_pfsoc.h > +++ b/include/hw/riscv/microchip_pfsoc.h > @@ -109,6 +109,7 @@ enum { > MICROCHIP_PFSOC_ENVM_DATA, > MICROCHIP_PFSOC_QSPI_XIP, > MICROCHIP_PFSOC_IOSCB, > + MICROCHIP_PFSOC_EMMC_SD_MUX, > MICROCHIP_PFSOC_DRAM_LO, > MICROCHIP_PFSOC_DRAM_LO_ALIAS, > MICROCHIP_PFSOC_DRAM_HI, > diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c > index 266f1c3342..c4146b7a6b 100644 > --- a/hw/riscv/microchip_pfsoc.c > +++ b/hw/riscv/microchip_pfsoc.c > @@ -122,6 +122,7 @@ static const MemMapEntry microchip_pfsoc_memmap[] = { > [MICROCHIP_PFSOC_ENVM_DATA] = { 0x20220000, 0x20000 }, > [MICROCHIP_PFSOC_QSPI_XIP] = { 0x21000000, 0x1000000 }, > [MICROCHIP_PFSOC_IOSCB] = { 0x30000000, 0x10000000 }, > + [MICROCHIP_PFSOC_EMMC_SD_MUX] = { 0x4f000000, 0x4 }, > [MICROCHIP_PFSOC_DRAM_LO] = { 0x80000000, 0x40000000 }, > [MICROCHIP_PFSOC_DRAM_LO_ALIAS] = { 0xc0000000, 0x40000000 }, > [MICROCHIP_PFSOC_DRAM_HI] = { 0x1000000000, 0x0 }, > @@ -411,6 +412,11 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp) > sysbus_mmio_map(SYS_BUS_DEVICE(&s->ioscb), 0, > memmap[MICROCHIP_PFSOC_IOSCB].base); > > + /* eMMC/SD mux */ > + create_unimplemented_device("microchip.pfsoc.emmc_sd_mux", > + memmap[MICROCHIP_PFSOC_EMMC_SD_MUX].base, > + memmap[MICROCHIP_PFSOC_EMMC_SD_MUX].size); > + > /* QSPI Flash */ > memory_region_init_rom(qspi_xip_mem, OBJECT(dev), > "microchip.pfsoc.qspi_xip", > -- > 2.25.1 > >
diff --git a/include/hw/riscv/microchip_pfsoc.h b/include/hw/riscv/microchip_pfsoc.h index d0c666aae0..d30916f45d 100644 --- a/include/hw/riscv/microchip_pfsoc.h +++ b/include/hw/riscv/microchip_pfsoc.h @@ -109,6 +109,7 @@ enum { MICROCHIP_PFSOC_ENVM_DATA, MICROCHIP_PFSOC_QSPI_XIP, MICROCHIP_PFSOC_IOSCB, + MICROCHIP_PFSOC_EMMC_SD_MUX, MICROCHIP_PFSOC_DRAM_LO, MICROCHIP_PFSOC_DRAM_LO_ALIAS, MICROCHIP_PFSOC_DRAM_HI, diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c index 266f1c3342..c4146b7a6b 100644 --- a/hw/riscv/microchip_pfsoc.c +++ b/hw/riscv/microchip_pfsoc.c @@ -122,6 +122,7 @@ static const MemMapEntry microchip_pfsoc_memmap[] = { [MICROCHIP_PFSOC_ENVM_DATA] = { 0x20220000, 0x20000 }, [MICROCHIP_PFSOC_QSPI_XIP] = { 0x21000000, 0x1000000 }, [MICROCHIP_PFSOC_IOSCB] = { 0x30000000, 0x10000000 }, + [MICROCHIP_PFSOC_EMMC_SD_MUX] = { 0x4f000000, 0x4 }, [MICROCHIP_PFSOC_DRAM_LO] = { 0x80000000, 0x40000000 }, [MICROCHIP_PFSOC_DRAM_LO_ALIAS] = { 0xc0000000, 0x40000000 }, [MICROCHIP_PFSOC_DRAM_HI] = { 0x1000000000, 0x0 }, @@ -411,6 +412,11 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->ioscb), 0, memmap[MICROCHIP_PFSOC_IOSCB].base); + /* eMMC/SD mux */ + create_unimplemented_device("microchip.pfsoc.emmc_sd_mux", + memmap[MICROCHIP_PFSOC_EMMC_SD_MUX].base, + memmap[MICROCHIP_PFSOC_EMMC_SD_MUX].size); + /* QSPI Flash */ memory_region_init_rom(qspi_xip_mem, OBJECT(dev), "microchip.pfsoc.qspi_xip",