| Message ID | 20200714051140.8090-1-s.trumtrar@pengutronix.de |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/4] ARM: imx7d: add enet2 clk sel | expand |
On Tue, Jul 14, 2020 at 07:11:37AM +0200, Steffen Trumtrar wrote: > Add clock source init for the second ethernet port. > This changes the clock direction and clock selection in a way that the > ethernet phy reference clock is routed as an output. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > --- > arch/arm/mach-imx/mach-imx7d.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c > index 879c35929a13..7a203f660721 100644 > --- a/arch/arm/mach-imx/mach-imx7d.c > +++ b/arch/arm/mach-imx/mach-imx7d.c > @@ -65,6 +65,9 @@ static void __init imx7d_enet_clk_sel(void) > if (!IS_ERR(gpr)) { > regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0); > regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0); > + regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK, 0); > + regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET2_CLK_DIR_MASK, > + IMX7D_GPR1_ENET2_CLK_DIR_MASK); I would like to see such code get removed from machine code rather than added. Can we deal with these IOMUXC_GPR bits in some driver code? Shawn > } else { > pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n"); > } > -- > 2.27.0 >
Hi! Shawn Guo <shawnguo@kernel.org> writes: > On Tue, Jul 14, 2020 at 07:11:37AM +0200, Steffen Trumtrar > wrote: >> Add clock source init for the second ethernet port. >> This changes the clock direction and clock selection in a way >> that the >> ethernet phy reference clock is routed as an output. >> >> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> >> --- >> arch/arm/mach-imx/mach-imx7d.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/arch/arm/mach-imx/mach-imx7d.c >> b/arch/arm/mach-imx/mach-imx7d.c >> index 879c35929a13..7a203f660721 100644 >> --- a/arch/arm/mach-imx/mach-imx7d.c >> +++ b/arch/arm/mach-imx/mach-imx7d.c >> @@ -65,6 +65,9 @@ static void __init imx7d_enet_clk_sel(void) >> if (!IS_ERR(gpr)) { >> regmap_update_bits(gpr, IOMUXC_GPR1, >> IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0); >> regmap_update_bits(gpr, IOMUXC_GPR1, >> IMX7D_GPR1_ENET_CLK_DIR_MASK, 0); >> + regmap_update_bits(gpr, IOMUXC_GPR1, >> IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK, 0); >> + regmap_update_bits(gpr, IOMUXC_GPR1, >> IMX7D_GPR1_ENET2_CLK_DIR_MASK, >> + IMX7D_GPR1_ENET2_CLK_DIR_MASK); > > I would like to see such code get removed from machine code > rather than > added. Can we deal with these IOMUXC_GPR bits in some driver > code? > My comment got lost in the v2: I know, that this is not a "good solution", but I don't know how we can handle this in a better way. Open for suggestions. Of course, putting it in the machine code is suboptimal. If anyone has a good idea where the 4 gpr1 calls should go without producing a massive complexity overhead, please share. Best regards, Steffen -- Pengutronix e.K. | Dipl.-Inform. Steffen Trumtrar | Steuerwalder Str. 21 | https://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686| Fax: +49-5121-206917-5555 |
Hi! Steffen Trumtrar <s.trumtrar@pengutronix.de> writes: > The GW4100 will be an i.MX7D based board from IoTMaxx. > The support is almost complete apart from the pmic setup which currently > can not be used because of a hardware bug. This can and will be changed > once it is fixed in hardware. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Is there anything I missed to have at least an initial version of the devicetree applied? Best regards, Steffen -- Pengutronix e.K. | Dipl.-Inform. Steffen Trumtrar | Steuerwalder Str. 21 | https://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686| Fax: +49-5121-206917-5555 |
On Tue, Jul 14, 2020 at 07:11:37AM +0200, Steffen Trumtrar wrote: > Add clock source init for the second ethernet port. > This changes the clock direction and clock selection in a way that the > ethernet phy reference clock is routed as an output. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > --- > arch/arm/mach-imx/mach-imx7d.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c > index 879c35929a13..7a203f660721 100644 > --- a/arch/arm/mach-imx/mach-imx7d.c > +++ b/arch/arm/mach-imx/mach-imx7d.c > @@ -65,6 +65,9 @@ static void __init imx7d_enet_clk_sel(void) > if (!IS_ERR(gpr)) { > regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0); > regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0); > + regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK, 0); > + regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET2_CLK_DIR_MASK, > + IMX7D_GPR1_ENET2_CLK_DIR_MASK); Can this be pushed down to bootloader or moved into network driver? Shawn > } else { > pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n"); > } > -- > 2.27.0 >
On Tue, Jul 14, 2020 at 07:11:38AM +0200, Steffen Trumtrar wrote: > The Maxim DS2482 is an I2C to 1-wire bridge. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Hi Rob, Are you okay with this one? Shawn > --- > Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml > index 4165352a590a..7d1dc3d96257 100644 > --- a/Documentation/devicetree/bindings/trivial-devices.yaml > +++ b/Documentation/devicetree/bindings/trivial-devices.yaml > @@ -107,6 +107,8 @@ properties: > # 5 Bit Programmable, Pulse-Width Modulator > - maxim,ds1050 > # 10-bit 8 channels 300ks/s SPI ADC with temperature sensor > + - maxim,ds2482 > + # I2C to 1-wire bridge > - maxim,max1027 > # 10-bit 12 channels 300ks/s SPI ADC with temperature sensor > - maxim,max1029 > -- > 2.27.0 >
On Tue, Jul 14, 2020 at 07:11:39AM +0200, Steffen Trumtrar wrote: > IoTmaxx GmbH is a developer of IoT solutions. The website is > https://www.iotmaxx.com/ > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Hi Rob, Are okay with this vendor prefix addition? Shawn > --- > Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml > index 9aeab66be85f..26bffde7fe0a 100644 > --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml > +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml > @@ -497,6 +497,8 @@ patternProperties: > description: Inverse Path > "^iom,.*": > description: Iomega Corporation > + "^iotmaxx,.*": > + description: IoTmaxx GmbH > "^isee,.*": > description: ISEE 2007 S.L. > "^isil,.*": > -- > 2.27.0 >
Steffen Trumtrar <s.trumtrar@pengutronix.de> writes: > Hi! > > Steffen Trumtrar <s.trumtrar@pengutronix.de> writes: > >> The GW4100 will be an i.MX7D based board from IoTMaxx. >> The support is almost complete apart from the pmic setup which currently >> can not be used because of a hardware bug. This can and will be changed >> once it is fixed in hardware. >> >> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > > Is there anything I missed to have at least an initial version of the > devicetree applied? > Gentle ping! Best regards, Steffen -- Pengutronix e.K. | Dipl.-Inform. Steffen Trumtrar | Steuerwalder Str. 21 | https://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686| Fax: +49-5121-206917-5555 |
Hi Steffen, On Tue, Jul 14, 2020 at 2:12 AM Steffen Trumtrar <s.trumtrar@pengutronix.de> wrote: > + memory { memory@80000000 to avoid dtc W=1 warning. > +&ecspi2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi2>; > + num-chipselects = <1>; This property is not used for spi-imx. > + status = "okay"; > + > + flash: m25p80@0 { Node names should be generic: spi-flash@0 > +/* Expansion slot */ > +&ecspi3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi3>; > + num-chipselects = <1>; > + status = "okay"; > +}; > + > +&fec2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_enet2>, > + <&pinctrl_mdio>, > + <&pinctrl_rmii_phy>; > + /* set the enet_ref_clk and enet_out with a 50MHz clock */ > + assigned-clocks = <&clks IMX7D_ENET_PHY_REF_ROOT_DIV>; > + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; > + assigned-clock-rates = <50000000>; > + clocks = <&clks IMX7D_ENET2_IPG_ROOT_CLK>, > + <&clks IMX7D_ENET_AXI_ROOT_CLK>, > + <&clks IMX7D_ENET2_TIME_ROOT_CLK>, > + <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>, > + <&clks IMX7D_ENET2_REF_ROOT_DIV>; > + clock-names = "ipg", "ahb", "ptp", > + "enet_clk_ref", "enet_out"; > + phy-handle = <ðphy1>; > + phy-mode = "rmii"; > + phy-reset-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; This property is considered obsolete. Please describe the Ethernet PHY reset inside the ethernet-phy nodes as per: Documentation/devicetree/bindings/net/ethernet-phy.yaml > + pcf85363: pcf85363@51 { rtc@51
On 12.01.21 14:29, Fabio Estevam wrote: > Hi Steffen, > > On Tue, Jul 14, 2020 at 2:12 AM Steffen Trumtrar > <s.trumtrar@pengutronix.de> wrote: > >> + memory { > > memory@80000000 to avoid dtc W=1 warning. Or just drop it as the bootloader likely fixed it up anyway?
diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c index 879c35929a13..7a203f660721 100644 --- a/arch/arm/mach-imx/mach-imx7d.c +++ b/arch/arm/mach-imx/mach-imx7d.c @@ -65,6 +65,9 @@ static void __init imx7d_enet_clk_sel(void) if (!IS_ERR(gpr)) { regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0); regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0); + regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK, 0); + regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET2_CLK_DIR_MASK, + IMX7D_GPR1_ENET2_CLK_DIR_MASK); } else { pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n"); }
Add clock source init for the second ethernet port. This changes the clock direction and clock selection in a way that the ethernet phy reference clock is routed as an output. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> --- arch/arm/mach-imx/mach-imx7d.c | 3 +++ 1 file changed, 3 insertions(+)