Message ID | 20201222131138.2693-2-padmarao.begari@microchip.com |
---|---|
State | Superseded |
Delegated to: | Andes |
Headers | show |
Series | [v7,1/7] riscv: Add DMA 64-bit address support | expand |
> From: Padmarao Begari [mailto:padmarao.begari@microchip.com] > Sent: Tuesday, December 22, 2020 9:12 PM > To: u-boot@lists.denx.de; bmeng.cn@gmail.com; Rick Jian-Zhi Chen(陳建志); anup.patel@wdc.com; lukas.auer@aisec.fraunhofer.de; joe.hershberger@ni.com; lukma@denx.de; atish.patra@wdc.com > Cc: cyril.jean@microchip.com; lewis.hanly@microchip.com; ivan.griffin@emdalo.com; daire.mcnamara@emdalo.com; conor.dooley@microchip.com; Padmarao Begari > Subject: [PATCH v7 1/7] riscv: Add DMA 64-bit address support > > dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit > addresses, dma_addr_t need only be 32/64 bits wide. > > Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> > Reviewed-by: Anup Patel <anup.patel@wdc.com> > Reviewed-by: Bin Meng <bin.meng@windriver.com> > --- > arch/riscv/Kconfig | 4 ++++ > arch/riscv/include/asm/types.h | 4 ++++ > 2 files changed, 8 insertions(+) > Reviewed-by: Rick Chen <rick@andestech.com>
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 30b05408b1..55eaee2da6 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -152,6 +152,10 @@ config 32BIT config 64BIT bool +config DMA_ADDR_T_64BIT + bool + default y if 64BIT + config SIFIVE_CLINT bool depends on RISCV_MMODE || SPL_RISCV_MMODE diff --git a/arch/riscv/include/asm/types.h b/arch/riscv/include/asm/types.h index 403cf9a48f..b800b2d221 100644 --- a/arch/riscv/include/asm/types.h +++ b/arch/riscv/include/asm/types.h @@ -29,7 +29,11 @@ typedef unsigned short umode_t; #include <stddef.h> +#ifdef CONFIG_DMA_ADDR_T_64BIT +typedef u64 dma_addr_t; +#else typedef u32 dma_addr_t; +#endif typedef unsigned long phys_addr_t; typedef unsigned long phys_size_t;