| Message ID | 20200921115141.70598-5-seanga2@gmail.com |
|---|---|
| State | Accepted |
| Commit | 768502e2a7f283a715dd1f62e304393a88422545 |
| Delegated to: | Andes |
| Headers | show |
| Series | riscv: Correctly handle IPIs already pending upon boot | expand |
> Even though we no longer call smp_function if an IPI was not sent by > U-Boot, we still need to clear any IPIs which were pending from the > execution environment. Otherwise, secondary harts will busy-wait in > secondary_hart_loop, instead of relaxing. > > Along with the previous commit ("riscv: Use a valid bit to ignore > already-pending IPIs"), this fixes SMP booting on the Kendryte K210. > > Signed-off-by: Sean Anderson <seanga2@gmail.com> > Reviewed-by: Bin Meng <bin.meng@windriver.com> > > --- > > Changes in v3: > - Rename riscv_ipi_init_secondary_hart to dummy_pending_ipi_clear > - Only compile dummy_pending_ipi_clear when SMP is enabled > > Changes in v2: > - Make riscv_ipi_init_secondary_hart static > > arch/riscv/cpu/cpu.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > Reviewed-by: Rick Chen <rick@andestech.com>
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index bfa2d4a426..85592f5bee 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -72,6 +72,17 @@ static int riscv_cpu_probe(void) return 0; } +/* + * This is called on secondary harts just after the IPI is init'd. Currently + * there's nothing to do, since we just need to clear any existing IPIs, and + * that is handled by the sending of an ipi itself. + */ +#if CONFIG_IS_ENABLED(SMP) +static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1) +{ +} +#endif + int arch_cpu_init_dm(void) { int ret; @@ -111,6 +122,15 @@ int arch_cpu_init_dm(void) ret = riscv_init_ipi(); if (ret) return ret; + + /* + * Clear all pending IPIs on secondary harts. We don't do anything on + * the boot hart, since we never send an IPI to ourselves, and no + * interrupts are enabled + */ + ret = smp_call_function((ulong)dummy_pending_ipi_clear, 0, 0, 0); + if (ret) + return ret; #endif return 0;
Even though we no longer call smp_function if an IPI was not sent by U-Boot, we still need to clear any IPIs which were pending from the execution environment. Otherwise, secondary harts will busy-wait in secondary_hart_loop, instead of relaxing. Along with the previous commit ("riscv: Use a valid bit to ignore already-pending IPIs"), this fixes SMP booting on the Kendryte K210. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> --- Changes in v3: - Rename riscv_ipi_init_secondary_hart to dummy_pending_ipi_clear - Only compile dummy_pending_ipi_clear when SMP is enabled Changes in v2: - Make riscv_ipi_init_secondary_hart static arch/riscv/cpu/cpu.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)