| Message ID | 20200914142303.21307-5-seanga2@gmail.com |
|---|---|
| State | Superseded |
| Delegated to: | Andes |
| Headers | show |
| Series | riscv: Correctly handle IPIs already pending upon boot | expand |
> Even though we no longer call smp_function if an IPI was not sent by > U-Boot, we still need to clear any IPIs which were pending from the > execution environment. Otherwise, secondary harts will busy-wait in > secondary_hart_loop, instead of relaxing. > > Signed-off-by: Sean Anderson <seanga2@gmail.com> > Reviewed-by: Bin Meng <bin.meng@windriver.com> > > --- > > Changes in v2: > - Make riscv_ipi_init_secondary_hart static > > arch/riscv/cpu/cpu.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c > index bfa2d4a426..ab08af5a33 100644 > --- a/arch/riscv/cpu/cpu.c > +++ b/arch/riscv/cpu/cpu.c > @@ -72,6 +72,15 @@ static int riscv_cpu_probe(void) > return 0; > } > > +/* > + * This is called on secondary harts just after the IPI is init'd. Currently > + * there's nothing to do, since we just need to clear any existing IPIs, and > + * that is handled by the sending of an ipi itself. Can we call this function as dummy_pending_ipi_clear() or prior_stage_pending_ipi_clear(), since the it is the IPIs which does not be clear from prior stage bootloader and it is not a general case. It is special case to deal with. Also move the descriptions "On the K210, the prior stage bootloader does not clear IPIs. This presents a problem,..." in [PATCH v2 0/7] riscv: Correctly handle IPIs already pending upon boot here or commit of patch [1/7]. Because it will not show in git log history any more. With the history description, it will help to understand and readable about the SMP enhance flow for the later joiner. Thanks, Rick > + */ > +static void riscv_ipi_init_secondary_hart(ulong hart, ulong arg0, ulong arg1) > +{ > +} > + > int arch_cpu_init_dm(void) > { > int ret; > @@ -111,6 +120,15 @@ int arch_cpu_init_dm(void) > ret = riscv_init_ipi(); > if (ret) > return ret; > + > + /* > + * Clear all pending IPIs on secondary harts. We don't do anything on > + * the boot hart, since we never send an IPI to ourselves, and no > + * interrupts are enabled > + */ > + ret = smp_call_function((ulong)riscv_ipi_init_secondary_hart, 0, 0, 0); > + if (ret) > + return ret; > #endif > > return 0; > -- > 2.28.0 >
On 9/15/20 5:15 AM, Rick Chen wrote: >> Even though we no longer call smp_function if an IPI was not sent by >> U-Boot, we still need to clear any IPIs which were pending from the >> execution environment. Otherwise, secondary harts will busy-wait in >> secondary_hart_loop, instead of relaxing. >> >> Signed-off-by: Sean Anderson <seanga2@gmail.com> >> Reviewed-by: Bin Meng <bin.meng@windriver.com> >> >> --- >> >> Changes in v2: >> - Make riscv_ipi_init_secondary_hart static >> >> arch/riscv/cpu/cpu.c | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c >> index bfa2d4a426..ab08af5a33 100644 >> --- a/arch/riscv/cpu/cpu.c >> +++ b/arch/riscv/cpu/cpu.c >> @@ -72,6 +72,15 @@ static int riscv_cpu_probe(void) >> return 0; >> } >> >> +/* >> + * This is called on secondary harts just after the IPI is init'd. Currently >> + * there's nothing to do, since we just need to clear any existing IPIs, and >> + * that is handled by the sending of an ipi itself. > > Can we call this function as dummy_pending_ipi_clear() or Sure that sounds good. > prior_stage_pending_ipi_clear(), since the it is the IPIs which does > not be clear > from prior stage bootloader and it is not a general case. It is > special case to deal with. > > Also move the descriptions "On the K210, the prior stage bootloader > does not clear IPIs. This presents a problem,..." > in [PATCH v2 0/7] riscv: Correctly handle IPIs already pending upon > boot here or commit of patch [1/7]. > Because it will not show in git log history any more. > > With the history description, it will help to understand and readable > about the SMP enhance flow for the later joiner. Ok, I will expand the description of those patches. > > Thanks, > Rick > >> + */ >> +static void riscv_ipi_init_secondary_hart(ulong hart, ulong arg0, ulong arg1) >> +{ >> +} >> + >> int arch_cpu_init_dm(void) >> { >> int ret; >> @@ -111,6 +120,15 @@ int arch_cpu_init_dm(void) >> ret = riscv_init_ipi(); >> if (ret) >> return ret; >> + >> + /* >> + * Clear all pending IPIs on secondary harts. We don't do anything on >> + * the boot hart, since we never send an IPI to ourselves, and no >> + * interrupts are enabled >> + */ >> + ret = smp_call_function((ulong)riscv_ipi_init_secondary_hart, 0, 0, 0); >> + if (ret) >> + return ret; >> #endif >> >> return 0; >> -- >> 2.28.0 >>
> On 9/15/20 5:15 AM, Rick Chen wrote: > >> Even though we no longer call smp_function if an IPI was not sent by > >> U-Boot, we still need to clear any IPIs which were pending from the > >> execution environment. Otherwise, secondary harts will busy-wait in > >> secondary_hart_loop, instead of relaxing. > >> > >> Signed-off-by: Sean Anderson <seanga2@gmail.com> > >> Reviewed-by: Bin Meng <bin.meng@windriver.com> > >> > >> --- > >> > >> Changes in v2: > >> - Make riscv_ipi_init_secondary_hart static > >> > >> arch/riscv/cpu/cpu.c | 18 ++++++++++++++++++ > >> 1 file changed, 18 insertions(+) > >> > >> diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c > >> index bfa2d4a426..ab08af5a33 100644 > >> --- a/arch/riscv/cpu/cpu.c > >> +++ b/arch/riscv/cpu/cpu.c > >> @@ -72,6 +72,15 @@ static int riscv_cpu_probe(void) > >> return 0; > >> } > >> > >> +/* > >> + * This is called on secondary harts just after the IPI is init'd. Currently > >> + * there's nothing to do, since we just need to clear any existing IPIs, and > >> + * that is handled by the sending of an ipi itself. > > > > Can we call this function as dummy_pending_ipi_clear() or > > Sure that sounds good. BTW, riscv_ipi_init_secondary_hart() shall be enclosed by #if CONFIG_IS_ENABLED(SMP), or there will occur a warning when some other configs compiling: arch/riscv/cpu/cpu.c:80:13: warning: 'riscv_ipi_init_secondary_hart' defined but not used [-Wunused-function] static void riscv_ipi_init_secondary_hart(ulong hart, ulong arg0, ulong arg1) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Thanks, Rick > > > prior_stage_pending_ipi_clear(), since the it is the IPIs which does > > not be clear > > from prior stage bootloader and it is not a general case. It is > > special case to deal with. > > > > Also move the descriptions "On the K210, the prior stage bootloader > > does not clear IPIs. This presents a problem,..." > > in [PATCH v2 0/7] riscv: Correctly handle IPIs already pending upon > > boot here or commit of patch [1/7]. > > Because it will not show in git log history any more. > > > > With the history description, it will help to understand and readable > > about the SMP enhance flow for the later joiner. > > Ok, I will expand the description of those patches. > > > > > Thanks, > > Rick > > > >> + */ > >> +static void riscv_ipi_init_secondary_hart(ulong hart, ulong arg0, ulong arg1) > >> +{ > >> +} > >> + > >> int arch_cpu_init_dm(void) > >> { > >> int ret; > >> @@ -111,6 +120,15 @@ int arch_cpu_init_dm(void) > >> ret = riscv_init_ipi(); > >> if (ret) > >> return ret; > >> + > >> + /* > >> + * Clear all pending IPIs on secondary harts. We don't do anything on > >> + * the boot hart, since we never send an IPI to ourselves, and no > >> + * interrupts are enabled > >> + */ > >> + ret = smp_call_function((ulong)riscv_ipi_init_secondary_hart, 0, 0, 0); > >> + if (ret) > >> + return ret; > >> #endif > >> > >> return 0; > >> -- > >> 2.28.0 > >> >
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index bfa2d4a426..ab08af5a33 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -72,6 +72,15 @@ static int riscv_cpu_probe(void) return 0; } +/* + * This is called on secondary harts just after the IPI is init'd. Currently + * there's nothing to do, since we just need to clear any existing IPIs, and + * that is handled by the sending of an ipi itself. + */ +static void riscv_ipi_init_secondary_hart(ulong hart, ulong arg0, ulong arg1) +{ +} + int arch_cpu_init_dm(void) { int ret; @@ -111,6 +120,15 @@ int arch_cpu_init_dm(void) ret = riscv_init_ipi(); if (ret) return ret; + + /* + * Clear all pending IPIs on secondary harts. We don't do anything on + * the boot hart, since we never send an IPI to ourselves, and no + * interrupts are enabled + */ + ret = smp_call_function((ulong)riscv_ipi_init_secondary_hart, 0, 0, 0); + if (ret) + return ret; #endif return 0;