| Message ID | 20200626143638.16512-1-geert+renesas@glider.be |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | dt-bindings: pinctrl: renesas,rza2-pinctrl: Convert to json-schema | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | warning | total: 0 errors, 2 warnings, 100 lines checked |
| robh/dt-meta-schema | success |
Hi Geert, Thanks for your work. On 2020-06-26 16:36:38 +0200, Geert Uytterhoeven wrote: > Convert the Renesas RZ/A2 combined Pin and GPIO controller Device Tree > binding documentation to json-schema. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > .../bindings/pinctrl/renesas,rza2-pinctrl.txt | 87 --------------- > .../pinctrl/renesas,rza2-pinctrl.yaml | 100 ++++++++++++++++++ > 2 files changed, 100 insertions(+), 87 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt > create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt > deleted file mode 100644 > index a63ccd476cdaf919..0000000000000000 > --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt > +++ /dev/null > @@ -1,87 +0,0 @@ > -Renesas RZ/A2 combined Pin and GPIO controller > - > -The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO controller. > -Pin multiplexing and GPIO configuration is performed on a per-pin basis. > -Each port features up to 8 pins, each of them configurable for GPIO > -function (port mode) or in alternate function mode. > -Up to 8 different alternate function modes exist for each single pin. > - > -Pin controller node > -------------------- > - > -Required properties: > - - compatible: shall be: > - - "renesas,r7s9210-pinctrl": for RZ/A2M > - - reg > - Address base and length of the memory area where the pin controller > - hardware is mapped to. > - - gpio-controller > - This pin controller also controls pins as GPIO > - - #gpio-cells > - Must be 2 > - - gpio-ranges > - Expresses the total number of GPIO ports/pins in this SoC > - > -Example: Pin controller node for RZ/A2M SoC (r7s9210) > - > - pinctrl: pin-controller@fcffe000 { > - compatible = "renesas,r7s9210-pinctrl"; > - reg = <0xfcffe000 0x1000>; > - > - gpio-controller; > - #gpio-cells = <2>; > - gpio-ranges = <&pinctrl 0 0 176>; > - }; > - > -Sub-nodes > ---------- > - > -The child nodes of the pin controller designate pins to be used for > -specific peripheral functions or as GPIO. > - > -- Pin multiplexing sub-nodes: > - A pin multiplexing sub-node describes how to configure a set of > - (or a single) pin in some desired alternate function mode. > - The values for the pinmux properties are a combination of port name, pin > - number and the desired function index. Use the RZA2_PINMUX macro located > - in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily define these. > - For assigning GPIO pins, use the macro RZA2_PIN also in r7s9210-pinctrl.h > - to express the desired port pin. > - > - Required properties: > - - pinmux: > - integer array representing pin number and pin multiplexing configuration. > - When a pin has to be configured in alternate function mode, use this > - property to identify the pin by its global index, and provide its > - alternate function configuration number along with it. > - When multiple pins are required to be configured as part of the same > - alternate function they shall be specified as members of the same > - argument list of a single "pinmux" property. > - Helper macros to ease assembling the pin index from its position > - (port where it sits on and pin number) and alternate function identifier > - are provided by the pin controller header file at: > - <dt-bindings/pinctrl/r7s9210-pinctrl.h> > - Integers values in "pinmux" argument list are assembled as: > - ((PORT * 8 + PIN) | MUX_FUNC << 16) > - > - Example: Board specific pins configuration > - > - &pinctrl { > - /* Serial Console */ > - scif4_pins: serial4 { > - pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */ > - <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */ > - }; > - }; > - > - Example: Assigning a GPIO: > - > - leds { > - status = "okay"; > - compatible = "gpio-leds"; > - > - led0 { > - /* P6_0 */ > - gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>; > - }; > - }; > diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml > new file mode 100644 > index 0000000000000000..b7911a994f3a9f12 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml > @@ -0,0 +1,100 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/A2 combined Pin and GPIO controller > + > +maintainers: > + - Chris Brandt <chris.brandt@renesas.com> > + - Geert Uytterhoeven <geert+renesas@glider.be> > + > +description: > + The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO > + controller. > + Pin multiplexing and GPIO configuration is performed on a per-pin basis. > + Each port features up to 8 pins, each of them configurable for GPIO function > + (port mode) or in alternate function mode. > + Up to 8 different alternate function modes exist for each single pin. This paragraph formatting looks odd, but I'm not sure it's intentional or not :-) In either case with or without this changed, Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > + > +properties: > + compatible: > + const: "renesas,r7s9210-pinctrl" # RZ/A2M > + > + reg: > + maxItems: 1 > + > + gpio-controller: true > + > + '#gpio-cells': > + const: 2 > + description: > + The first cell contains the global GPIO port index, constructed using the > + RZA2_PIN() helper macro in r7s9210-pinctrl.h. > + E.g. "RZA2_PIN(PORT6, 0)" for P6_0. > + > + gpio-ranges: > + maxItems: 1 > + > +patternProperties: > + "^.*$": > + if: > + type: object > + then: > + allOf: > + - $ref: pincfg-node.yaml# > + - $ref: pinmux-node.yaml# > + description: > + The child nodes of the pin controller designate pins to be used for > + specific peripheral functions or as GPIO. > + > + A pin multiplexing sub-node describes how to configure a set of > + (or a single) pin in some desired alternate function mode. > + The values for the pinmux properties are a combination of port name, > + pin number and the desired function index. Use the RZA2_PINMUX macro > + located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily > + define these. > + For assigning GPIO pins, use the macro RZA2_PIN also in > + to express the desired port pin. > + > + properties: > + phandle: true > + > + pinmux: > + description: > + Values are constructed from GPIO port number, pin number, and > + alternate function configuration number using the RZA2_PINMUX() > + helper macro in r7s9210-pinctrl.h. > + > + required: > + - pinmux > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + - gpio-controller > + - '#gpio-cells' > + - gpio-ranges > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/pinctrl/r7s9210-pinctrl.h> > + pinctrl: pin-controller@fcffe000 { > + compatible = "renesas,r7s9210-pinctrl"; > + reg = <0xfcffe000 0x1000>; > + > + gpio-controller; > + #gpio-cells = <2>; > + gpio-ranges = <&pinctrl 0 0 176>; > + > + /* Serial Console */ > + scif4_pins: serial4 { > + pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */ > + <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */ > + }; > + }; > -- > 2.17.1 >
On Sun, Jun 28, 2020 at 06:39:02PM +0200, Niklas Söderlund wrote: > Hi Geert, > > Thanks for your work. > > On 2020-06-26 16:36:38 +0200, Geert Uytterhoeven wrote: > > Convert the Renesas RZ/A2 combined Pin and GPIO controller Device Tree > > binding documentation to json-schema. > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > > --- > > .../bindings/pinctrl/renesas,rza2-pinctrl.txt | 87 --------------- > > .../pinctrl/renesas,rza2-pinctrl.yaml | 100 ++++++++++++++++++ > > 2 files changed, 100 insertions(+), 87 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt > > create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml > > > > diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt > > deleted file mode 100644 > > index a63ccd476cdaf919..0000000000000000 > > --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt > > +++ /dev/null > > @@ -1,87 +0,0 @@ > > -Renesas RZ/A2 combined Pin and GPIO controller > > - > > -The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO controller. > > -Pin multiplexing and GPIO configuration is performed on a per-pin basis. > > -Each port features up to 8 pins, each of them configurable for GPIO > > -function (port mode) or in alternate function mode. > > -Up to 8 different alternate function modes exist for each single pin. > > - > > -Pin controller node > > -------------------- > > - > > -Required properties: > > - - compatible: shall be: > > - - "renesas,r7s9210-pinctrl": for RZ/A2M > > - - reg > > - Address base and length of the memory area where the pin controller > > - hardware is mapped to. > > - - gpio-controller > > - This pin controller also controls pins as GPIO > > - - #gpio-cells > > - Must be 2 > > - - gpio-ranges > > - Expresses the total number of GPIO ports/pins in this SoC > > - > > -Example: Pin controller node for RZ/A2M SoC (r7s9210) > > - > > - pinctrl: pin-controller@fcffe000 { > > - compatible = "renesas,r7s9210-pinctrl"; > > - reg = <0xfcffe000 0x1000>; > > - > > - gpio-controller; > > - #gpio-cells = <2>; > > - gpio-ranges = <&pinctrl 0 0 176>; > > - }; > > - > > -Sub-nodes > > ---------- > > - > > -The child nodes of the pin controller designate pins to be used for > > -specific peripheral functions or as GPIO. > > - > > -- Pin multiplexing sub-nodes: > > - A pin multiplexing sub-node describes how to configure a set of > > - (or a single) pin in some desired alternate function mode. > > - The values for the pinmux properties are a combination of port name, pin > > - number and the desired function index. Use the RZA2_PINMUX macro located > > - in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily define these. > > - For assigning GPIO pins, use the macro RZA2_PIN also in r7s9210-pinctrl.h > > - to express the desired port pin. > > - > > - Required properties: > > - - pinmux: > > - integer array representing pin number and pin multiplexing configuration. > > - When a pin has to be configured in alternate function mode, use this > > - property to identify the pin by its global index, and provide its > > - alternate function configuration number along with it. > > - When multiple pins are required to be configured as part of the same > > - alternate function they shall be specified as members of the same > > - argument list of a single "pinmux" property. > > - Helper macros to ease assembling the pin index from its position > > - (port where it sits on and pin number) and alternate function identifier > > - are provided by the pin controller header file at: > > - <dt-bindings/pinctrl/r7s9210-pinctrl.h> > > - Integers values in "pinmux" argument list are assembled as: > > - ((PORT * 8 + PIN) | MUX_FUNC << 16) > > - > > - Example: Board specific pins configuration > > - > > - &pinctrl { > > - /* Serial Console */ > > - scif4_pins: serial4 { > > - pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */ > > - <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */ > > - }; > > - }; > > - > > - Example: Assigning a GPIO: > > - > > - leds { > > - status = "okay"; > > - compatible = "gpio-leds"; > > - > > - led0 { > > - /* P6_0 */ > > - gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>; > > - }; > > - }; > > diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml > > new file mode 100644 > > index 0000000000000000..b7911a994f3a9f12 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml > > @@ -0,0 +1,100 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Renesas RZ/A2 combined Pin and GPIO controller > > + > > +maintainers: > > + - Chris Brandt <chris.brandt@renesas.com> > > + - Geert Uytterhoeven <geert+renesas@glider.be> > > + > > +description: > > + The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO > > + controller. > > + Pin multiplexing and GPIO configuration is performed on a per-pin basis. > > + Each port features up to 8 pins, each of them configurable for GPIO function > > + (port mode) or in alternate function mode. > > + Up to 8 different alternate function modes exist for each single pin. > > This paragraph formatting looks odd, but I'm not sure it's intentional > or not :-) In either case with or without this changed, If you do want the formatting here maintained, you need a '|'.
On Fri, 26 Jun 2020 16:36:38 +0200, Geert Uytterhoeven wrote: > Convert the Renesas RZ/A2 combined Pin and GPIO controller Device Tree > binding documentation to json-schema. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > .../bindings/pinctrl/renesas,rza2-pinctrl.txt | 87 --------------- > .../pinctrl/renesas,rza2-pinctrl.yaml | 100 ++++++++++++++++++ > 2 files changed, 100 insertions(+), 87 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt > create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
On Wed, Jul 15, 2020 at 10:10 PM Rob Herring <robh@kernel.org> wrote: > On Fri, 26 Jun 2020 16:36:38 +0200, Geert Uytterhoeven wrote: > > Convert the Renesas RZ/A2 combined Pin and GPIO controller Device Tree > > binding documentation to json-schema. > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > > --- > > .../bindings/pinctrl/renesas,rza2-pinctrl.txt | 87 --------------- > > .../pinctrl/renesas,rza2-pinctrl.yaml | 100 ++++++++++++++++++ > > 2 files changed, 100 insertions(+), 87 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt > > create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml > > > > Reviewed-by: Rob Herring <robh@kernel.org> Thanks, queueing in sh-pfc-for-v5.9. Gr{oetje,eeting}s, Geert
diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt deleted file mode 100644 index a63ccd476cdaf919..0000000000000000 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt +++ /dev/null @@ -1,87 +0,0 @@ -Renesas RZ/A2 combined Pin and GPIO controller - -The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO controller. -Pin multiplexing and GPIO configuration is performed on a per-pin basis. -Each port features up to 8 pins, each of them configurable for GPIO -function (port mode) or in alternate function mode. -Up to 8 different alternate function modes exist for each single pin. - -Pin controller node -------------------- - -Required properties: - - compatible: shall be: - - "renesas,r7s9210-pinctrl": for RZ/A2M - - reg - Address base and length of the memory area where the pin controller - hardware is mapped to. - - gpio-controller - This pin controller also controls pins as GPIO - - #gpio-cells - Must be 2 - - gpio-ranges - Expresses the total number of GPIO ports/pins in this SoC - -Example: Pin controller node for RZ/A2M SoC (r7s9210) - - pinctrl: pin-controller@fcffe000 { - compatible = "renesas,r7s9210-pinctrl"; - reg = <0xfcffe000 0x1000>; - - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl 0 0 176>; - }; - -Sub-nodes ---------- - -The child nodes of the pin controller designate pins to be used for -specific peripheral functions or as GPIO. - -- Pin multiplexing sub-nodes: - A pin multiplexing sub-node describes how to configure a set of - (or a single) pin in some desired alternate function mode. - The values for the pinmux properties are a combination of port name, pin - number and the desired function index. Use the RZA2_PINMUX macro located - in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily define these. - For assigning GPIO pins, use the macro RZA2_PIN also in r7s9210-pinctrl.h - to express the desired port pin. - - Required properties: - - pinmux: - integer array representing pin number and pin multiplexing configuration. - When a pin has to be configured in alternate function mode, use this - property to identify the pin by its global index, and provide its - alternate function configuration number along with it. - When multiple pins are required to be configured as part of the same - alternate function they shall be specified as members of the same - argument list of a single "pinmux" property. - Helper macros to ease assembling the pin index from its position - (port where it sits on and pin number) and alternate function identifier - are provided by the pin controller header file at: - <dt-bindings/pinctrl/r7s9210-pinctrl.h> - Integers values in "pinmux" argument list are assembled as: - ((PORT * 8 + PIN) | MUX_FUNC << 16) - - Example: Board specific pins configuration - - &pinctrl { - /* Serial Console */ - scif4_pins: serial4 { - pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */ - <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */ - }; - }; - - Example: Assigning a GPIO: - - leds { - status = "okay"; - compatible = "gpio-leds"; - - led0 { - /* P6_0 */ - gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>; - }; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml new file mode 100644 index 0000000000000000..b7911a994f3a9f12 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/A2 combined Pin and GPIO controller + +maintainers: + - Chris Brandt <chris.brandt@renesas.com> + - Geert Uytterhoeven <geert+renesas@glider.be> + +description: + The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO + controller. + Pin multiplexing and GPIO configuration is performed on a per-pin basis. + Each port features up to 8 pins, each of them configurable for GPIO function + (port mode) or in alternate function mode. + Up to 8 different alternate function modes exist for each single pin. + +properties: + compatible: + const: "renesas,r7s9210-pinctrl" # RZ/A2M + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + description: + The first cell contains the global GPIO port index, constructed using the + RZA2_PIN() helper macro in r7s9210-pinctrl.h. + E.g. "RZA2_PIN(PORT6, 0)" for P6_0. + + gpio-ranges: + maxItems: 1 + +patternProperties: + "^.*$": + if: + type: object + then: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + description: + The child nodes of the pin controller designate pins to be used for + specific peripheral functions or as GPIO. + + A pin multiplexing sub-node describes how to configure a set of + (or a single) pin in some desired alternate function mode. + The values for the pinmux properties are a combination of port name, + pin number and the desired function index. Use the RZA2_PINMUX macro + located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily + define these. + For assigning GPIO pins, use the macro RZA2_PIN also in + to express the desired port pin. + + properties: + phandle: true + + pinmux: + description: + Values are constructed from GPIO port number, pin number, and + alternate function configuration number using the RZA2_PINMUX() + helper macro in r7s9210-pinctrl.h. + + required: + - pinmux + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/pinctrl/r7s9210-pinctrl.h> + pinctrl: pin-controller@fcffe000 { + compatible = "renesas,r7s9210-pinctrl"; + reg = <0xfcffe000 0x1000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 176>; + + /* Serial Console */ + scif4_pins: serial4 { + pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */ + <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */ + }; + };
Convert the Renesas RZ/A2 combined Pin and GPIO controller Device Tree binding documentation to json-schema. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- .../bindings/pinctrl/renesas,rza2-pinctrl.txt | 87 --------------- .../pinctrl/renesas,rza2-pinctrl.yaml | 100 ++++++++++++++++++ 2 files changed, 100 insertions(+), 87 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml