diff mbox series

[RFC,2/8] fpu/softfloat: use the similiar logic to recognize sNaN and qNaN

Message ID 20200712234521.3972-3-zhiwei_liu@c-sky.com
State New
Headers show
Series Implement blfoat16 in softfloat | expand

Commit Message

LIU Zhiwei July 12, 2020, 11:45 p.m. UTC 
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
---
 fpu/softfloat-specialize.inc.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Richard Henderson July 13, 2020, 7:17 p.m. UTC | #1 
On 7/12/20 4:45 PM, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> ---
>  fpu/softfloat-specialize.inc.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c
> index 034d18199c..6b778a7830 100644
> --- a/fpu/softfloat-specialize.inc.c
> +++ b/fpu/softfloat-specialize.inc.c
> @@ -292,7 +292,7 @@ bool float32_is_quiet_nan(float32 a_, float_status *status)
>      if (snan_bit_is_one(status)) {
>          return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
>      } else {
> -        return ((uint32_t)(a << 1) >= 0xFF800000);
> +        return ((a >> 22) & 0x1FF) == 0x1FF;
>      }
>  #endif
>  }

I don't see a reason for this.  The previous was a bug, but this isn't.


r~
LIU Zhiwei July 13, 2020, 8:15 p.m. UTC | #2 
On 2020/7/14 3:17, Richard Henderson wrote:
> On 7/12/20 4:45 PM, LIU Zhiwei wrote:
>> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
>> ---
>>   fpu/softfloat-specialize.inc.c | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c
>> index 034d18199c..6b778a7830 100644
>> --- a/fpu/softfloat-specialize.inc.c
>> +++ b/fpu/softfloat-specialize.inc.c
>> @@ -292,7 +292,7 @@ bool float32_is_quiet_nan(float32 a_, float_status *status)
>>       if (snan_bit_is_one(status)) {
>>           return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
>>       } else {
>> -        return ((uint32_t)(a << 1) >= 0xFF800000);
>> +        return ((a >> 22) & 0x1FF) == 0x1FF;
>>       }
>>   #endif
>>   }
> I don't see a reason for this.  The previous was a bug, but this isn't.
It's not a bug,  just a clean up.

As you can see, we have already recognized a quiet nan by

  if (snan_bit_is_one(status)) {
          return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
  }

We need not to give another method to recognize it again.

Zhiwei
>
> r~
diff mbox series

Patch

diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c
index 034d18199c..6b778a7830 100644
--- a/fpu/softfloat-specialize.inc.c
+++ b/fpu/softfloat-specialize.inc.c
@@ -292,7 +292,7 @@  bool float32_is_quiet_nan(float32 a_, float_status *status)
     if (snan_bit_is_one(status)) {
         return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
     } else {
-        return ((uint32_t)(a << 1) >= 0xFF800000);
+        return ((a >> 22) & 0x1FF) == 0x1FF;
     }
 #endif
 }
@@ -309,7 +309,7 @@  bool float32_is_signaling_nan(float32 a_, float_status *status)
 #else
     uint32_t a = float32_val(a_);
     if (snan_bit_is_one(status)) {
-        return ((uint32_t)(a << 1) >= 0xFF800000);
+        return ((a >> 22) & 0x1FF) == 0x1FF;
     } else {
         return (((a >> 22) & 0x1FF) == 0x1FE) && (a & 0x003FFFFF);
     }
@@ -647,7 +647,7 @@  bool float64_is_quiet_nan(float64 a_, float_status *status)
         return (((a >> 51) & 0xFFF) == 0xFFE)
             && (a & 0x0007FFFFFFFFFFFFULL);
     } else {
-        return ((a << 1) >= 0xFFF0000000000000ULL);
+        return ((a >> 51) & 0xFFF) == 0xFFF;
     }
 #endif
 }
@@ -664,7 +664,7 @@  bool float64_is_signaling_nan(float64 a_, float_status *status)
 #else
     uint64_t a = float64_val(a_);
     if (snan_bit_is_one(status)) {
-        return ((a << 1) >= 0xFFF0000000000000ULL);
+        return ((a >> 51) & 0xFFF) == 0xFFF;
     } else {
         return (((a >> 51) & 0xFFF) == 0xFFE)
             && (a & UINT64_C(0x0007FFFFFFFFFFFF));