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[U-Boot] Pull request: u-boot-riscv/master

Message ID 79a8cdc1-95c9-41e0-a481-19594593b78c@ATCPCS12.andestech.com
State Changes Requested
Delegated to: Tom Rini
Headers show
Series [U-Boot] Pull request: u-boot-riscv/master | expand

Pull-request

git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git

Message

Andes July 2, 2020, 2:51 a.m. UTC 
Hi Tom,

Please pull some riscv updates:

- sbi: Add newline to error message
- fu540: dts: Correct reg size of otp and dmc nodes
- Enhance reserved memory fixup about PMP information passed from OpenSbi
- sifive: fu540: Add gpio-restart support
- qemu: Add syscon reboot and poweroff support
- qemu-riscv: Update QEMU run command
- Assorted fixes related to reserved memory
- fu540: enable all cache ways from U-Boot proper
- use log functions in fdt_fixup

Thanks
Rick

https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/703843003

The following changes since commit bcfe764ee925d0820e82c69ccf75b71d142644c7:

  Merge tag 'efi-2020-07-rc6-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2020-06-30 17:15:39 -0400)

are available in the Git repository at:

  git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git

for you to fetch changes up to f889e3183a003e4e238f87cc9bb01bfcbd5548a5:

  riscv: use log functions in fdt_fixup (2020-07-02 10:31:39 +0800)

----------------------------------------------------------------
Atish Patra (2):
      riscv: Do not return error if reserved node already exists
      riscv: Use optimized version of fdtdec_get_addr_size_no_parent

Bin Meng (11):
      riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node
      riscv: fu540: dts: Correct reg size of otp and dmc nodes
      riscv: Avoid the reserved memory fixup if src and dst point to the same place
      riscv: Expand the DT size before copy reserved memory node
      riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE
      sysreset: syscon: Don't assume default value for offset and mask property
      sysreset: syscon: Support value property
      riscv: Do not build reset.c if SYSRESET is on
      riscv: qemu: Add syscon reboot and poweroff support
      riscv: sifive: fu540: Add gpio-restart support
      doc: qemu-riscv: Update QEMU run command

Heinrich Schuchardt (1):
      riscv: use log functions in fdt_fixup

Pragnesh Patel (1):
      riscv: sifive: fu540: enable all cache ways from U-Boot proper

Sean Anderson (1):
      riscv: sbi: Add newline to error message

 arch/riscv/Kconfig                        |  3 +++
 arch/riscv/cpu/fu540/Makefile             |  1 +
 arch/riscv/cpu/fu540/cache.c              | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/dts/fu540-c000-u-boot.dtsi     | 10 +++++++---
 arch/riscv/include/asm/arch-fu540/cache.h | 14 ++++++++++++++
 arch/riscv/lib/Makefile                   |  2 ++
 arch/riscv/lib/fdt_fixup.c                | 46 ++++++++++++++++++++++++++++++++--------------
 board/emulation/qemu-riscv/Kconfig        |  4 ++++
 board/sifive/fu540/Kconfig                |  2 ++
 board/sifive/fu540/fu540.c                | 10 +++++++++-
 common/spl/spl_opensbi.c                  |  2 +-
 configs/sifive_fu540_defconfig            |  1 -
 doc/board/emulation/qemu-riscv.rst        | 10 +++++-----
 drivers/sysreset/sysreset_syscon.c        | 28 +++++++++++++++++++++++++---
 14 files changed, 158 insertions(+), 28 deletions(-)
 create mode 100644 arch/riscv/cpu/fu540/cache.c
 create mode 100644 arch/riscv/include/asm/arch-fu540/cache.h

Comments

Tom Rini July 2, 2020, 1:53 p.m. UTC | #1 
On Thu, Jul 02, 2020 at 10:51:48AM +0800, uboot@andestech.com wrote:

> Hi Tom,
> 
> Please pull some riscv updates:
> 
> - sbi: Add newline to error message
> - fu540: dts: Correct reg size of otp and dmc nodes
> - Enhance reserved memory fixup about PMP information passed from OpenSbi
> - sifive: fu540: Add gpio-restart support
> - qemu: Add syscon reboot and poweroff support
> - qemu-riscv: Update QEMU run command
> - Assorted fixes related to reserved memory
> - fu540: enable all cache ways from U-Boot proper
> - use log functions in fdt_fixup

This changes a few MIPS and ARM platforms.  We're a few days away from
release, so I don't feel comfortable taking this right now as I assume
it hasn't been tested on the other platforms as well.  Sorry.
Rick Chen July 3, 2020, 6:01 a.m. UTC | #2 
> From: Tom Rini [mailto:trini@konsulko.com]
> Sent: Thursday, July 02, 2020 9:53 PM
> To: Open Source Project uboot
> Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
>
> On Thu, Jul 02, 2020 at 10:51:48AM +0800, uboot@andestech.com wrote:
>
> > Hi Tom,
> >
> > Please pull some riscv updates:
> >
> > - sbi: Add newline to error message
> > - fu540: dts: Correct reg size of otp and dmc nodes
> > - Enhance reserved memory fixup about PMP information passed from
> > OpenSbi
> > - sifive: fu540: Add gpio-restart support
> > - qemu: Add syscon reboot and poweroff support
> > - qemu-riscv: Update QEMU run command
> > - Assorted fixes related to reserved memory
> > - fu540: enable all cache ways from U-Boot proper
> > - use log functions in fdt_fixup
>
> This changes a few MIPS and ARM platforms.  We're a few days away from release, so I don't feel comfortable taking this right now as I assume it hasn't been tested on the other platforms as well.  Sorry.

Hi Tom,

Thanks for your suggestions.


Hi Bin,

Can you separate this series about sysreset into two series ?
[PATCH 1/5] sysreset: syscon: Don't assume default value for offset
and mask property
[PATCH 2/5] sysreset: syscon: Support value property
[PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
[PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support
[PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support

It looks like that patch 3/5, 4/5, 5/5 doesn't depend on patch 1/5 and 2/5.

Thanks,
Rick

>
> --
Bin Meng July 3, 2020, 6:52 a.m. UTC | #3 
Hi Rick,

On Fri, Jul 3, 2020 at 2:01 PM Rick Chen <rickchen36@gmail.com> wrote:
>
> > From: Tom Rini [mailto:trini@konsulko.com]
> > Sent: Thursday, July 02, 2020 9:53 PM
> > To: Open Source Project uboot
> > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
> >
> > On Thu, Jul 02, 2020 at 10:51:48AM +0800, uboot@andestech.com wrote:
> >
> > > Hi Tom,
> > >
> > > Please pull some riscv updates:
> > >
> > > - sbi: Add newline to error message
> > > - fu540: dts: Correct reg size of otp and dmc nodes
> > > - Enhance reserved memory fixup about PMP information passed from
> > > OpenSbi
> > > - sifive: fu540: Add gpio-restart support
> > > - qemu: Add syscon reboot and poweroff support
> > > - qemu-riscv: Update QEMU run command
> > > - Assorted fixes related to reserved memory
> > > - fu540: enable all cache ways from U-Boot proper
> > > - use log functions in fdt_fixup
> >
> > This changes a few MIPS and ARM platforms.  We're a few days away from release, so I don't feel comfortable taking this right now as I assume it hasn't been tested on the other platforms as well.  Sorry.
>
> Hi Tom,
>
> Thanks for your suggestions.
>
>
> Hi Bin,
>
> Can you separate this series about sysreset into two series ?
> [PATCH 1/5] sysreset: syscon: Don't assume default value for offset
> and mask property
> [PATCH 2/5] sysreset: syscon: Support value property
> [PATCH 3/5] riscv: Do not build reset.c if SYSRESET is on
> [PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support
> [PATCH 5/5] riscv: sifive: fu540: Add gpio-restart support
>
> It looks like that patch 3/5, 4/5, 5/5 doesn't depend on patch 1/5 and 2/5.

Patch 3 and 5 can be targeted for this release, and let's do patch
1,2,4 for the next release.

So you can drop patch 1,2,4 in your queue and resend the PR. Thanks!

Regards,
Bin