diff mbox series

[6/8] net: dwc_eth_qos: Split eqos_start() to get link speed

Message ID 20200430104423.31014-1-david.wu@rock-chips.com
State Superseded
Delegated to: Joe Hershberger
Headers show
Series Add dwc_eth_qos support for rockchip | expand

Commit Message

David Wu April 30, 2020, 10:44 a.m. UTC
Before enabling mac and mac working, we need to obtain
the current link speed to configure the clock, so split
eqos_start into two functions.

Signed-off-by: David Wu <david.wu@rock-chips.com>
---

 drivers/net/dwc_eth_qos.c | 56 ++++++++++++++++++++++++++-------------
 1 file changed, 38 insertions(+), 18 deletions(-)

Comments

Patrice CHOTARD April 30, 2020, 3:33 p.m. UTC | #1
Hi David

On 4/30/20 12:44 PM, David Wu wrote:
> Before enabling mac and mac working, we need to obtain
> the current link speed to configure the clock, so split
> eqos_start into two functions.
>
> Signed-off-by: David Wu <david.wu@rock-chips.com>
> ---
>
>  drivers/net/dwc_eth_qos.c | 56 ++++++++++++++++++++++++++-------------
>  1 file changed, 38 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> index b5d5156292..25b3449047 100644
> --- a/drivers/net/dwc_eth_qos.c
> +++ b/drivers/net/dwc_eth_qos.c
> @@ -1051,19 +1051,15 @@ static int eqos_write_hwaddr(struct udevice *dev)
>  	return 0;
>  }
>  
> -static int eqos_start(struct udevice *dev)
> +static int eqos_init(struct udevice *dev)
>  {
>  	struct eqos_priv *eqos = dev_get_priv(dev);
> -	int ret, i, limit;
> +	int ret, limit;
>  	ulong rate;
> -	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
> -	ulong last_rx_desc;
> +	u32 val;
>  
>  	debug("%s(dev=%p):\n", __func__, dev);
>  
> -	eqos->tx_desc_idx = 0;
> -	eqos->rx_desc_idx = 0;
> -
>  	ret = eqos->config->ops->eqos_start_clks(dev);
>  	if (ret < 0) {
>  		pr_err("eqos_start_clks() failed: %d", ret);
> @@ -1151,6 +1147,30 @@ static int eqos_start(struct udevice *dev)
>  		goto err_shutdown_phy;
>  	}
>  
> +	debug("%s: OK\n", __func__);
> +	return 0;
> +
> +err_shutdown_phy:
> +	phy_shutdown(eqos->phy);
> +err_stop_resets:
> +	eqos->config->ops->eqos_stop_resets(dev);
> +err_stop_clks:
> +	eqos->config->ops->eqos_stop_clks(dev);
> +err:
> +	pr_err("FAILED: %d", ret);
> +	return ret;
> +}
> +
> +static void eqos_enable(struct udevice *dev)
> +{
> +	struct eqos_priv *eqos = dev_get_priv(dev);
> +	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
> +	ulong last_rx_desc;
> +	int i;
> +
> +	eqos->tx_desc_idx = 0;
> +	eqos->rx_desc_idx = 0;
> +
>  	/* Configure MTL */
>  
>  	/* Enable Store and Forward mode for TX */
> @@ -1352,19 +1372,19 @@ static int eqos_start(struct udevice *dev)
>  	writel(last_rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
>  
>  	eqos->started = true;
> +}
>  
> -	debug("%s: OK\n", __func__);
> -	return 0;
> +static int eqos_start(struct udevice *dev)
> +{
> +	int ret;
>  
> -err_shutdown_phy:
> -	phy_shutdown(eqos->phy);
> -err_stop_resets:
> -	eqos->config->ops->eqos_stop_resets(dev);
> -err_stop_clks:
> -	eqos->config->ops->eqos_stop_clks(dev);
> -err:
> -	pr_err("FAILED: %d", ret);
> -	return ret;
> +	ret = eqos_init(dev);
> +	if (ret)
> +		return ret;
> +
> +	eqos_enable(dev);
> +
> +	return 0;

Can you explain why you are splitting this function in 2 parts and calling these parts sequentially ?

Please elaborate

Thanks

Patrice


>  }
>  
>  static void eqos_stop(struct udevice *dev)
David Wu May 9, 2020, 6:42 a.m. UTC | #2
Hi Patrice,

在 2020/4/30 下午11:33, Patrice CHOTARD 写道:
> Can you explain why you are splitting this function in 2 parts and calling these parts sequentially ?

For rockchip, need to obtain the current link speed to configure the tx 
clocks, (for example, in rgmii mode, 1000M link: 125M, 100M link: 25M, 
10M link is 2.5M rate) and then enable gmac. So after the 
adjust_link(), before the start gamc, this intermediate stage needs to 
configure the clock according to the current link speed.
Patrice CHOTARD May 11, 2020, 12:48 p.m. UTC | #3
Hi David

On 5/9/20 8:42 AM, David Wu wrote:
> Hi Patrice,
>
> 在 2020/4/30 下午11:33, Patrice CHOTARD 写道:
>> Can you explain why you are splitting this function in 2 parts and calling these parts sequentially ?
>
> For rockchip, need to obtain the current link speed to configure the tx clocks, (for example, in rgmii mode, 1000M link: 125M, 100M link: 25M, 10M link is 2.5M rate) and then enable gmac. So after the adjust_link(), before the start gamc, this intermediate stage needs to configure the clock according to the current link speed.
>
>
Please, add these informations in the commit message

Thanks

Patrice
David Wu May 12, 2020, 1:56 a.m. UTC | #4
Hi Patrice,

在 2020/5/11 下午8:48, Patrice CHOTARD 写道:
> Hi David
> 
> On 5/9/20 8:42 AM, David Wu wrote:
>> Hi Patrice,
>>
>> 在 2020/4/30 下午11:33, Patrice CHOTARD 写道:
>>> Can you explain why you are splitting this function in 2 parts and calling these parts sequentially ?
>>
>> For rockchip, need to obtain the current link speed to configure the tx clocks, (for example, in rgmii mode, 1000M link: 125M, 100M link: 25M, 10M link is 2.5M rate) and then enable gmac. So after the adjust_link(), before the start gamc, this intermediate stage needs to configure the clock according to the current link speed.
>>
>>
> Please, add these informations in the commit message

I will add it at the next version, Thanks.

> 
> Thanks
> 
> Patrice
>
diff mbox series

Patch

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index b5d5156292..25b3449047 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1051,19 +1051,15 @@  static int eqos_write_hwaddr(struct udevice *dev)
 	return 0;
 }
 
-static int eqos_start(struct udevice *dev)
+static int eqos_init(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
-	int ret, i, limit;
+	int ret, limit;
 	ulong rate;
-	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
-	ulong last_rx_desc;
+	u32 val;
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
-	eqos->tx_desc_idx = 0;
-	eqos->rx_desc_idx = 0;
-
 	ret = eqos->config->ops->eqos_start_clks(dev);
 	if (ret < 0) {
 		pr_err("eqos_start_clks() failed: %d", ret);
@@ -1151,6 +1147,30 @@  static int eqos_start(struct udevice *dev)
 		goto err_shutdown_phy;
 	}
 
+	debug("%s: OK\n", __func__);
+	return 0;
+
+err_shutdown_phy:
+	phy_shutdown(eqos->phy);
+err_stop_resets:
+	eqos->config->ops->eqos_stop_resets(dev);
+err_stop_clks:
+	eqos->config->ops->eqos_stop_clks(dev);
+err:
+	pr_err("FAILED: %d", ret);
+	return ret;
+}
+
+static void eqos_enable(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
+	ulong last_rx_desc;
+	int i;
+
+	eqos->tx_desc_idx = 0;
+	eqos->rx_desc_idx = 0;
+
 	/* Configure MTL */
 
 	/* Enable Store and Forward mode for TX */
@@ -1352,19 +1372,19 @@  static int eqos_start(struct udevice *dev)
 	writel(last_rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
 
 	eqos->started = true;
+}
 
-	debug("%s: OK\n", __func__);
-	return 0;
+static int eqos_start(struct udevice *dev)
+{
+	int ret;
 
-err_shutdown_phy:
-	phy_shutdown(eqos->phy);
-err_stop_resets:
-	eqos->config->ops->eqos_stop_resets(dev);
-err_stop_clks:
-	eqos->config->ops->eqos_stop_clks(dev);
-err:
-	pr_err("FAILED: %d", ret);
-	return ret;
+	ret = eqos_init(dev);
+	if (ret)
+		return ret;
+
+	eqos_enable(dev);
+
+	return 0;
 }
 
 static void eqos_stop(struct udevice *dev)