diff mbox series

mmc: fsl_esdhc: actually enable cache snooping on mpc830x

Message ID 20200130120634.23079-1-rasmus.villemoes@prevas.dk
State Accepted
Commit ede2822864c3145859372f4ad1b82f4c98584128
Delegated to: Peng Fan
Headers show
Series mmc: fsl_esdhc: actually enable cache snooping on mpc830x | expand

Commit Message

Rasmus Villemoes Jan. 30, 2020, 12:06 p.m. UTC 
The reference manuals for MPC8308 and MPC8309 both say that the
esdhcctl aka DMA Control Register "is implemented as SDHCCR" in the
System configuration registers. Unfortunately, that doesn't mean that
the registers are just mirrors of each other - any write to esdhcctl
is simply ignored. So to actually enable cache snooping, we
unfortunately have to add a little ifdeffery.

There is, naturally, no description of the bit fields of esdhcctl in
the MPC8309 manual, but comparing the description of esdhcctl from the
LS1021A reference manual to the description of the sdhccr in MPC8309,
one also finds that the fields are bit-reversed, so the bit to set is
0x02000000 rather than 0x00000040 - this is also what board_mmc_init()
uses in the two gdsys/mpc8308/ boards.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
---
 drivers/mmc/fsl_esdhc.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

Comments

Peng Fan Feb. 5, 2020, 7:08 a.m. UTC | #1 
> Subject: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on mpc830x

+ Y.b

Are you ok with this patch?

Thanks,
Peng.

> 
> The reference manuals for MPC8308 and MPC8309 both say that the esdhcctl
> aka DMA Control Register "is implemented as SDHCCR" in the System
> configuration registers. Unfortunately, that doesn't mean that the registers are
> just mirrors of each other - any write to esdhcctl is simply ignored. So to
> actually enable cache snooping, we unfortunately have to add a little
> ifdeffery.
> 
> There is, naturally, no description of the bit fields of esdhcctl in the MPC8309
> manual, but comparing the description of esdhcctl from the LS1021A
> reference manual to the description of the sdhccr in MPC8309, one also finds
> that the fields are bit-reversed, so the bit to set is
> 0x02000000 rather than 0x00000040 - this is also what board_mmc_init()
> uses in the two gdsys/mpc8308/ boards.
> 
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
> ---
>  drivers/mmc/fsl_esdhc.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
> 1e7d606cd8..34e5bd270f 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -577,6 +577,18 @@ static int esdhc_set_ios_common(struct
> fsl_esdhc_priv *priv, struct mmc *mmc)
>  	return 0;
>  }
> 
> +static void esdhc_enable_cache_snooping(struct fsl_esdhc *regs) {
> +#ifdef CONFIG_ARCH_MPC830X
> +	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
> +	sysconf83xx_t *sysconf = &immr->sysconf;
> +
> +	setbits_be32(&sysconf->sdhccr, 0x02000000); #else
> +	esdhc_write32(&regs->esdhcctl, 0x00000040); #endif }
> +
>  static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
> {
>  	struct fsl_esdhc *regs = priv->esdhc_regs; @@ -592,8 +604,7 @@ static
> int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
>  			return -ETIMEDOUT;
>  	}
> 
> -	/* Enable cache snooping */
> -	esdhc_write32(&regs->esdhcctl, 0x00000040);
> +	esdhc_enable_cache_snooping(regs);
> 
>  	esdhc_setbits32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
> 
> --
> 2.23.0
Yangbo Lu Feb. 6, 2020, 4:14 a.m. UTC | #2 
> -----Original Message-----
> From: Peng Fan <peng.fan@nxp.com>
> Sent: Wednesday, February 5, 2020 3:08 PM
> To: Rasmus Villemoes <rasmus.villemoes@prevas.dk>; u-boot@lists.denx.de;
> Y.b. Lu <yangbo.lu@nxp.com>
> Cc: Mario Six <mario.six@gdsys.cc>
> Subject: RE: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on
> mpc830x
> 
> > Subject: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on
> mpc830x
> 
> + Y.b
> 
> Are you ok with this patch?

The mpc830x is old Freescale PowerPC platforms I don't have.
But I agree the fix-up.

Reviewed-by: Yangbo Lu <yangbo.lu@nxp.com>

> 
> Thanks,
> Peng.
> 
> >
> > The reference manuals for MPC8308 and MPC8309 both say that the
> esdhcctl
> > aka DMA Control Register "is implemented as SDHCCR" in the System
> > configuration registers. Unfortunately, that doesn't mean that the registers
> are
> > just mirrors of each other - any write to esdhcctl is simply ignored. So to
> > actually enable cache snooping, we unfortunately have to add a little
> > ifdeffery.
> >
> > There is, naturally, no description of the bit fields of esdhcctl in the MPC8309
> > manual, but comparing the description of esdhcctl from the LS1021A
> > reference manual to the description of the sdhccr in MPC8309, one also finds
> > that the fields are bit-reversed, so the bit to set is
> > 0x02000000 rather than 0x00000040 - this is also what board_mmc_init()
> > uses in the two gdsys/mpc8308/ boards.
> >
> > Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
> > ---
> >  drivers/mmc/fsl_esdhc.c | 15 +++++++++++++--
> >  1 file changed, 13 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
> > 1e7d606cd8..34e5bd270f 100644
> > --- a/drivers/mmc/fsl_esdhc.c
> > +++ b/drivers/mmc/fsl_esdhc.c
> > @@ -577,6 +577,18 @@ static int esdhc_set_ios_common(struct
> > fsl_esdhc_priv *priv, struct mmc *mmc)
> >  	return 0;
> >  }
> >
> > +static void esdhc_enable_cache_snooping(struct fsl_esdhc *regs) {
> > +#ifdef CONFIG_ARCH_MPC830X
> > +	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
> > +	sysconf83xx_t *sysconf = &immr->sysconf;
> > +
> > +	setbits_be32(&sysconf->sdhccr, 0x02000000); #else
> > +	esdhc_write32(&regs->esdhcctl, 0x00000040); #endif }
> > +
> >  static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc
> *mmc)
> > {
> >  	struct fsl_esdhc *regs = priv->esdhc_regs; @@ -592,8 +604,7 @@ static
> > int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
> >  			return -ETIMEDOUT;
> >  	}
> >
> > -	/* Enable cache snooping */
> > -	esdhc_write32(&regs->esdhcctl, 0x00000040);
> > +	esdhc_enable_cache_snooping(regs);
> >
> >  	esdhc_setbits32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
> >
> > --
> > 2.23.0
Rasmus Villemoes Feb. 11, 2020, 2:51 p.m. UTC | #3 
On 06/02/2020 05.14, Y.b. Lu wrote:
>> -----Original Message-----
>> From: Peng Fan <peng.fan@nxp.com>
>> Sent: Wednesday, February 5, 2020 3:08 PM
>> To: Rasmus Villemoes <rasmus.villemoes@prevas.dk>; u-boot@lists.denx.de;
>> Y.b. Lu <yangbo.lu@nxp.com>
>> Cc: Mario Six <mario.six@gdsys.cc>
>> Subject: RE: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on
>> mpc830x
>>
>>> Subject: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on
>> mpc830x
>>
>> + Y.b
>>
>> Are you ok with this patch?
> 
> The mpc830x is old Freescale PowerPC platforms I don't have.
> But I agree the fix-up.
> 
> Reviewed-by: Yangbo Lu <yangbo.lu@nxp.com>

Thanks. Any chance this could make it to master before the 2020.04 release?

Rasmus
diff mbox series

Patch

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 1e7d606cd8..34e5bd270f 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -577,6 +577,18 @@  static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
 	return 0;
 }
 
+static void esdhc_enable_cache_snooping(struct fsl_esdhc *regs)
+{
+#ifdef CONFIG_ARCH_MPC830X
+	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+	sysconf83xx_t *sysconf = &immr->sysconf;
+
+	setbits_be32(&sysconf->sdhccr, 0x02000000);
+#else
+	esdhc_write32(&regs->esdhcctl, 0x00000040);
+#endif
+}
+
 static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
 {
 	struct fsl_esdhc *regs = priv->esdhc_regs;
@@ -592,8 +604,7 @@  static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
 			return -ETIMEDOUT;
 	}
 
-	/* Enable cache snooping */
-	esdhc_write32(&regs->esdhcctl, 0x00000040);
+	esdhc_enable_cache_snooping(regs);
 
 	esdhc_setbits32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);