| Message ID | 20191126013951.17065-2-david.wu@rock-chips.com |
|---|---|
| State | Accepted |
| Commit | 982fab393d1e0a866df1daeb2a0f692788a3814d |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | [U-Boot,1/3] net: gmac_rockchip: Add support for rk3308 | expand |
David, On 2019/11/26 上午9:39, David Wu wrote: > The rk3308 only support RMII mode, and if it is output clock > mode, better to use ref_clk pin with drive strength 12ma. > > Signed-off-by: David Wu <david.wu@rock-chips.com> Did you send this to kernel list at the same time? Thanks, - Kever > --- > arch/arm/dts/rk3308.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi > index 0eeec165d4..a5c0b72ae0 100644 > --- a/arch/arm/dts/rk3308.dtsi > +++ b/arch/arm/dts/rk3308.dtsi > @@ -627,6 +627,28 @@ > status = "disabled"; > }; > > + mac: ethernet@ff4e0000 { > + compatible = "rockchip,rk3308-mac"; > + reg = <0x0 0xff4e0000 0x0 0x10000>; > + rockchip,grf = <&grf>; > + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; > + clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>, > + <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>, > + <&cru SCLK_MAC>, <&cru ACLK_MAC>, > + <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>; > + clock-names = "stmmaceth", "mac_clk_rx", > + "mac_clk_tx", "clk_mac_ref", > + "clk_mac_refout", "aclk_mac", > + "pclk_mac", "clk_mac_speed"; > + phy-mode = "rmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rmii_pins &mac_refclk_12ma>; > + resets = <&cru SRST_MAC_A>; > + reset-names = "stmmaceth"; > + status = "disabled"; > + }; > + > cru: clock-controller@ff500000 { > compatible = "rockchip,rk3308-cru"; > reg = <0x0 0xff500000 0x0 0x1000>;
Hi Kever, 在 2019/11/27 下午2:23, Kever Yang 写道: > David, > > > On 2019/11/26 上午9:39, David Wu wrote: >> The rk3308 only support RMII mode, and if it is output clock >> mode, better to use ref_clk pin with drive strength 12ma. >> >> Signed-off-by: David Wu <david.wu@rock-chips.com> > > Did you send this to kernel list at the same time? I will send it later. > > > Thanks, > > - Kever > >> --- >> arch/arm/dts/rk3308.dtsi | 22 ++++++++++++++++++++++ >> 1 file changed, 22 insertions(+) >> >> diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi >> index 0eeec165d4..a5c0b72ae0 100644 >> --- a/arch/arm/dts/rk3308.dtsi >> +++ b/arch/arm/dts/rk3308.dtsi >> @@ -627,6 +627,28 @@ >> status = "disabled"; >> }; >> + mac: ethernet@ff4e0000 { >> + compatible = "rockchip,rk3308-mac"; >> + reg = <0x0 0xff4e0000 0x0 0x10000>; >> + rockchip,grf = <&grf>; >> + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; >> + interrupt-names = "macirq"; >> + clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>, >> + <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>, >> + <&cru SCLK_MAC>, <&cru ACLK_MAC>, >> + <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>; >> + clock-names = "stmmaceth", "mac_clk_rx", >> + "mac_clk_tx", "clk_mac_ref", >> + "clk_mac_refout", "aclk_mac", >> + "pclk_mac", "clk_mac_speed"; >> + phy-mode = "rmii"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&rmii_pins &mac_refclk_12ma>; >> + resets = <&cru SRST_MAC_A>; >> + reset-names = "stmmaceth"; >> + status = "disabled"; >> + }; >> + >> cru: clock-controller@ff500000 { >> compatible = "rockchip,rk3308-cru"; >> reg = <0x0 0xff500000 0x0 0x1000>; > > > >
On 2019/11/26 上午9:39, David Wu wrote: > The rk3308 only support RMII mode, and if it is output clock > mode, better to use ref_clk pin with drive strength 12ma. > > Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > arch/arm/dts/rk3308.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi > index 0eeec165d4..a5c0b72ae0 100644 > --- a/arch/arm/dts/rk3308.dtsi > +++ b/arch/arm/dts/rk3308.dtsi > @@ -627,6 +627,28 @@ > status = "disabled"; > }; > > + mac: ethernet@ff4e0000 { > + compatible = "rockchip,rk3308-mac"; > + reg = <0x0 0xff4e0000 0x0 0x10000>; > + rockchip,grf = <&grf>; > + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; > + clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>, > + <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>, > + <&cru SCLK_MAC>, <&cru ACLK_MAC>, > + <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>; > + clock-names = "stmmaceth", "mac_clk_rx", > + "mac_clk_tx", "clk_mac_ref", > + "clk_mac_refout", "aclk_mac", > + "pclk_mac", "clk_mac_speed"; > + phy-mode = "rmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rmii_pins &mac_refclk_12ma>; > + resets = <&cru SRST_MAC_A>; > + reset-names = "stmmaceth"; > + status = "disabled"; > + }; > + > cru: clock-controller@ff500000 { > compatible = "rockchip,rk3308-cru"; > reg = <0x0 0xff500000 0x0 0x1000>;
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi index 0eeec165d4..a5c0b72ae0 100644 --- a/arch/arm/dts/rk3308.dtsi +++ b/arch/arm/dts/rk3308.dtsi @@ -627,6 +627,28 @@ status = "disabled"; }; + mac: ethernet@ff4e0000 { + compatible = "rockchip,rk3308-mac"; + reg = <0x0 0xff4e0000 0x0 0x10000>; + rockchip,grf = <&grf>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>, + <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>, + <&cru SCLK_MAC>, <&cru ACLK_MAC>, + <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>; + clock-names = "stmmaceth", "mac_clk_rx", + "mac_clk_tx", "clk_mac_ref", + "clk_mac_refout", "aclk_mac", + "pclk_mac", "clk_mac_speed"; + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rmii_pins &mac_refclk_12ma>; + resets = <&cru SRST_MAC_A>; + reset-names = "stmmaceth"; + status = "disabled"; + }; + cru: clock-controller@ff500000 { compatible = "rockchip,rk3308-cru"; reg = <0x0 0xff500000 0x0 0x1000>;
The rk3308 only support RMII mode, and if it is output clock mode, better to use ref_clk pin with drive strength 12ma. Signed-off-by: David Wu <david.wu@rock-chips.com> --- arch/arm/dts/rk3308.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)