Message ID | 20191026002630.25865-1-michael@walle.cc |
---|---|
Headers | show |
Series | phy: atheros: cleanup and device tree bindings | expand |
On Fri, Oct 25, 2019 at 7:27 PM Michael Walle <michael@walle.cc> wrote: > > This series cleans up the Atheros PHY AR803x PHY driver and adds a > device tree binding for the most commonly used PHY settings like clock > output. > > If you're a board maintainer you're getting this mail because you probably > use an AR803x PHY on your board. Please have a look at your board specific > code and see if you can use the device tree bindings instead. Let me know, > if something is missing. Thank you for this! I was able to remove board_phy_config and the supporting ar8031_phy_fixup functions to a total of nearly 30 lines of code. For the whole series... Tested-by: Adam Ford <aford173@gmail.com> # imx6q_logic > > Michael Walle (9): > phy: atheros: introduce debug read and write functions > phy: atheros: move delay config to common function > phy: atheros: ar8035: remove extra delay config > phy: atheros: ar8035: use phy_{read|write}_mmd() > phy: atheros: don't overwrite debug register values > phy: atheros: fix delay configuration > phy: atheros: Add device tree bindings and config > phy: atheros: ar8035: remove static clock config > phy: atheros: consolidate {ar8031|ar8035}_config() > > doc/device-tree-bindings/net/phy/atheros.txt | 22 ++ > drivers/net/phy/atheros.c | 262 +++++++++++++++---- > 2 files changed, 240 insertions(+), 44 deletions(-) > create mode 100644 doc/device-tree-bindings/net/phy/atheros.txt > > Cc: Joe Hershberger <joe.hershberger@ni.com> > Cc: Fabio Estevam <fabio.estevam@nxp.com> > Cc: Adam Ford <aford173@gmail.com> > Cc: Otavio Salvador <otavio@ossystems.com.br> > Cc: Ian Ray <ian.ray@ge.com> > Cc: Jason Liu <jason.hui.liu@nxp.com> > Cc: Ye Li <ye.li@nxp.com> > Cc: Uri Mashiach <uri.mashiach@compulab.co.il> > Cc: Nikita Kiryanov <nikita@compulab.co.il> > Cc: Lukasz Majewski <lukma@denx.de> > Cc: Fabio Estevam <festevam@gmail.com> > Cc: Vanessa Maegima <vanessa.maegima@nxp.com> > Cc: Eric Bénard <eric@eukrea.com> > -- > 2.20.1 >
On Fri, Oct 25, 2019 at 10:20 PM Adam Ford <aford173@gmail.com> wrote: > > On Fri, Oct 25, 2019 at 7:27 PM Michael Walle <michael@walle.cc> wrote: > > > > This series cleans up the Atheros PHY AR803x PHY driver and adds a > > device tree binding for the most commonly used PHY settings like clock > > output. > > > > If you're a board maintainer you're getting this mail because you probably > > use an AR803x PHY on your board. Please have a look at your board specific > > code and see if you can use the device tree bindings instead. Let me know, > > if something is missing. > > Thank you for this! > > I was able to remove board_phy_config and the supporting > ar8031_phy_fixup functions to a total of nearly 30 lines of code. Please disregard my comment. From a cold boot, I cannot remove these lines. adam > > For the whole series... > Tested-by: Adam Ford <aford173@gmail.com> # imx6q_logic > > > > Michael Walle (9): > > phy: atheros: introduce debug read and write functions > > phy: atheros: move delay config to common function > > phy: atheros: ar8035: remove extra delay config > > phy: atheros: ar8035: use phy_{read|write}_mmd() > > phy: atheros: don't overwrite debug register values > > phy: atheros: fix delay configuration > > phy: atheros: Add device tree bindings and config > > phy: atheros: ar8035: remove static clock config > > phy: atheros: consolidate {ar8031|ar8035}_config() > > > > doc/device-tree-bindings/net/phy/atheros.txt | 22 ++ > > drivers/net/phy/atheros.c | 262 +++++++++++++++---- > > 2 files changed, 240 insertions(+), 44 deletions(-) > > create mode 100644 doc/device-tree-bindings/net/phy/atheros.txt > > > > Cc: Joe Hershberger <joe.hershberger@ni.com> > > Cc: Fabio Estevam <fabio.estevam@nxp.com> > > Cc: Adam Ford <aford173@gmail.com> > > Cc: Otavio Salvador <otavio@ossystems.com.br> > > Cc: Ian Ray <ian.ray@ge.com> > > Cc: Jason Liu <jason.hui.liu@nxp.com> > > Cc: Ye Li <ye.li@nxp.com> > > Cc: Uri Mashiach <uri.mashiach@compulab.co.il> > > Cc: Nikita Kiryanov <nikita@compulab.co.il> > > Cc: Lukasz Majewski <lukma@denx.de> > > Cc: Fabio Estevam <festevam@gmail.com> > > Cc: Vanessa Maegima <vanessa.maegima@nxp.com> > > Cc: Eric Bénard <eric@eukrea.com> > > -- > > 2.20.1 > >
Hi Adam, Am 2019-10-26 05:28, schrieb Adam Ford: > On Fri, Oct 25, 2019 at 10:20 PM Adam Ford <aford173@gmail.com> wrote: >> >> On Fri, Oct 25, 2019 at 7:27 PM Michael Walle <michael@walle.cc> >> wrote: >> > >> > This series cleans up the Atheros PHY AR803x PHY driver and adds a >> > device tree binding for the most commonly used PHY settings like clock >> > output. >> > >> > If you're a board maintainer you're getting this mail because you probably >> > use an AR803x PHY on your board. Please have a look at your board specific >> > code and see if you can use the device tree bindings instead. Let me know, >> > if something is missing. >> >> Thank you for this! >> >> I was able to remove board_phy_config and the supporting >> ar8031_phy_fixup functions to a total of nearly 30 lines of code. > > Please disregard my comment. From a cold boot, I cannot remove these > lines. Thank you for testing though. I guess your network drivers needs something like that: https://patchwork.ozlabs.org/patch/1184523/ So here is a cheap shot (very hacky, doesn't work with CONFIG_FEC_MXC_PHYADDR, completely untested, not even compiled ;). Could you try that? I need to add some debug messages to the Atheros PHY driver, so one could see if the device tree binding is working correctly. --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1264,7 +1264,7 @@ static const struct eth_ops fecmxc_ops = { .read_rom_hwaddr = fecmxc_read_rom_hwaddr, }; -static int device_get_phy_addr(struct udevice *dev) +static int device_get_phy_addr(struct udevice *dev, struct ofnode *phy_node) { struct ofnode_phandle_args phandle_args; int reg; @@ -1276,6 +1276,7 @@ static int device_get_phy_addr(struct udevice *dev) } reg = ofnode_read_u32_default(phandle_args.node, "reg", 0); + phy_node = &phandle_args.node; return reg; } @@ -1284,8 +1285,9 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev) { struct phy_device *phydev; int addr; + ofnode *phy_node; - addr = device_get_phy_addr(dev); + addr = device_get_phy_addr(dev, &phy_node); #ifdef CONFIG_FEC_MXC_PHYADDR addr = CONFIG_FEC_MXC_PHYADDR; #endif @@ -1294,6 +1296,7 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev) if (!phydev) return -ENODEV; + phydev->node = phy_node; priv->phydev = phydev; phy_config(phydev); -michael
On Sat, Oct 26, 2019 at 3:57 AM Michael Walle <michael@walle.cc> wrote: > > Hi Adam, > > Am 2019-10-26 05:28, schrieb Adam Ford: > > On Fri, Oct 25, 2019 at 10:20 PM Adam Ford <aford173@gmail.com> wrote: > >> > >> On Fri, Oct 25, 2019 at 7:27 PM Michael Walle <michael@walle.cc> > >> wrote: > >> > > >> > This series cleans up the Atheros PHY AR803x PHY driver and adds a > >> > device tree binding for the most commonly used PHY settings like clock > >> > output. > >> > > >> > If you're a board maintainer you're getting this mail because you probably > >> > use an AR803x PHY on your board. Please have a look at your board specific > >> > code and see if you can use the device tree bindings instead. Let me know, > >> > if something is missing. > >> > >> Thank you for this! > >> > >> I was able to remove board_phy_config and the supporting > >> ar8031_phy_fixup functions to a total of nearly 30 lines of code. > > > > Please disregard my comment. From a cold boot, I cannot remove these > > lines. > > Thank you for testing though. I guess your network drivers needs > something like that: > https://patchwork.ozlabs.org/patch/1184523/ I tried with the 2nd series also applied with no luck either on my i.MX6Q. > > So here is a cheap shot (very hacky, doesn't work with > CONFIG_FEC_MXC_PHYADDR, completely untested, not even compiled ;). Could > you try that? I need to add some debug messages to the Atheros PHY > driver, so one could see if the device tree binding is working > correctly. I will look at the following stuff when I have more time. > > --- a/drivers/net/fec_mxc.c > +++ b/drivers/net/fec_mxc.c > @@ -1264,7 +1264,7 @@ static const struct eth_ops fecmxc_ops = { > .read_rom_hwaddr = fecmxc_read_rom_hwaddr, > }; > > -static int device_get_phy_addr(struct udevice *dev) > +static int device_get_phy_addr(struct udevice *dev, struct ofnode > *phy_node) > { > struct ofnode_phandle_args phandle_args; > int reg; > @@ -1276,6 +1276,7 @@ static int device_get_phy_addr(struct udevice > *dev) > } > > reg = ofnode_read_u32_default(phandle_args.node, "reg", 0); > + phy_node = &phandle_args.node; > > return reg; > } > @@ -1284,8 +1285,9 @@ static int fec_phy_init(struct fec_priv *priv, > struct udevice *dev) > { > struct phy_device *phydev; > int addr; > + ofnode *phy_node; > > - addr = device_get_phy_addr(dev); > + addr = device_get_phy_addr(dev, &phy_node); > #ifdef CONFIG_FEC_MXC_PHYADDR > addr = CONFIG_FEC_MXC_PHYADDR; > #endif > @@ -1294,6 +1296,7 @@ static int fec_phy_init(struct fec_priv *priv, > struct udevice *dev) > if (!phydev) > return -ENODEV; > > + phydev->node = phy_node; > priv->phydev = phydev; > phy_config(phydev); > > > -michael