| Message ID | aa2b9543dd4c1be241c18f46c68b1b3526f1ea09.1570734167.git.simon@simonsouth.net |
|---|---|
| State | Accepted |
| Commit | 2cbdb6e051c4a59335101f5ef2084c838b9b5399 |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | rk3328: clk: Configure CPU clock during initialization | expand |
On 2019/10/11 上午3:28, Simon South wrote: > Add a call to rk3328_configure_cpu() during initialization to set the > CPU-clock frequency. > > Signed-off-by: Simon South <simon@simonsouth.net> Reviewed-by: Kever Yang<kever.yang@rock-chips.com> Thanks, - Kever > --- > arch/arm/include/asm/arch-rockchip/cru_rk3328.h | 3 +++ > drivers/clk/rockchip/clk_rk3328.c | 2 ++ > 2 files changed, 5 insertions(+) > > diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h > index 15b9788d9c..4bf69dbe08 100644 > --- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h > +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h > @@ -66,4 +66,7 @@ enum apll_frequencies { > APLL_600_MHZ, > }; > > +void rk3328_configure_cpu(struct rk3328_cru *cru, > + enum apll_frequencies apll_freq); > + > #endif /* __ASM_ARCH_CRU_RK3328_H_ */ > diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c > index a89e2ecc4a..4331048a87 100644 > --- a/drivers/clk/rockchip/clk_rk3328.c > +++ b/drivers/clk/rockchip/clk_rk3328.c > @@ -282,6 +282,8 @@ static void rkclk_init(struct rk3328_cru *cru) > u32 hclk_div; > u32 pclk_div; > > + rk3328_configure_cpu(cru, APLL_600_MHZ); > + > /* configure gpll cpll */ > rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); > rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg);
On 2019/10/14 下午5:06, Kever Yang wrote: > > On 2019/10/11 上午3:28, Simon South wrote: >> Add a call to rk3328_configure_cpu() during initialization to set the >> CPU-clock frequency. >> >> Signed-off-by: Simon South <simon@simonsouth.net> > > Reviewed-by: Kever Yang<kever.yang@rock-chips.com> Applied to u-boot-rockchip master. > > > Thanks, > - Kever >> --- >> arch/arm/include/asm/arch-rockchip/cru_rk3328.h | 3 +++ >> drivers/clk/rockchip/clk_rk3328.c | 2 ++ >> 2 files changed, 5 insertions(+) >> >> diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h >> b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h >> index 15b9788d9c..4bf69dbe08 100644 >> --- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h >> +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h >> @@ -66,4 +66,7 @@ enum apll_frequencies { >> APLL_600_MHZ, >> }; >> +void rk3328_configure_cpu(struct rk3328_cru *cru, >> + enum apll_frequencies apll_freq); >> + >> #endif /* __ASM_ARCH_CRU_RK3328_H_ */ >> diff --git a/drivers/clk/rockchip/clk_rk3328.c >> b/drivers/clk/rockchip/clk_rk3328.c >> index a89e2ecc4a..4331048a87 100644 >> --- a/drivers/clk/rockchip/clk_rk3328.c >> +++ b/drivers/clk/rockchip/clk_rk3328.c >> @@ -282,6 +282,8 @@ static void rkclk_init(struct rk3328_cru *cru) >> u32 hclk_div; >> u32 pclk_div; >> + rk3328_configure_cpu(cru, APLL_600_MHZ); >> + >> /* configure gpll cpll */ >> rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); >> rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg); > > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h index 15b9788d9c..4bf69dbe08 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h @@ -66,4 +66,7 @@ enum apll_frequencies { APLL_600_MHZ, }; +void rk3328_configure_cpu(struct rk3328_cru *cru, + enum apll_frequencies apll_freq); + #endif /* __ASM_ARCH_CRU_RK3328_H_ */ diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c index a89e2ecc4a..4331048a87 100644 --- a/drivers/clk/rockchip/clk_rk3328.c +++ b/drivers/clk/rockchip/clk_rk3328.c @@ -282,6 +282,8 @@ static void rkclk_init(struct rk3328_cru *cru) u32 hclk_div; u32 pclk_div; + rk3328_configure_cpu(cru, APLL_600_MHZ); + /* configure gpll cpll */ rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg);
Add a call to rk3328_configure_cpu() during initialization to set the CPU-clock frequency. Signed-off-by: Simon South <simon@simonsouth.net> --- arch/arm/include/asm/arch-rockchip/cru_rk3328.h | 3 +++ drivers/clk/rockchip/clk_rk3328.c | 2 ++ 2 files changed, 5 insertions(+)