| Message ID | 1299676619-7963-2-git-send-email-daniel.schwierzeck@googlemail.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
On 3/9/11 10:16 PM, daniel.schwierzeck@googlemail.com wrote: > All current CPUs and SoCs are based on Mips32 arch. The complete Is that true? What about purple SoC? IIUC It's based on MIPS 5Kc and capable of 64-bit, which MIPS32 is 32-bit only architecture. > code resides in the global arch/mips/cpu directory. This is not > suitable if other Mips architectures like Mips64 or Octeon should > be supported in the future. Just for the record. Personally, Octeon is sort of a special case. It's based on MIPS64 architecture, and definitely a MIPS SoC, but not usual MIPS machine. As Aaron already mentioned before, we have very few files sharable with other MIPS machines even in the Linux kernel case. I think it will take long time the Octeon port gets merged to upstream, regard- less of my opinions, because they have a lot of things need to be resolved prior to Octeon itself. > To achieve this the current CPU code is moved to its own mips32 > subdirectory. All Mips32 boards have to use mips32 as config switch > in board.cfg. > > Signed-off-by: Daniel Schwierzeck<daniel.schwierzeck@googlemail.com> > Cc: Shinya Kuribayashi<skuribay@pobox.com>
Hi Shinya, On 03/12/2011 03:43 PM, Shinya Kuribayashi wrote: > On 3/9/11 10:16 PM, daniel.schwierzeck@googlemail.com wrote: >> All current CPUs and SoCs are based on Mips32 arch. The complete > > Is that true? What about purple SoC? IIUC It's based on MIPS 5Kc > and capable of 64-bit, which MIPS32 is 32-bit only architecture. that was an assumption. I could not find any information about Purple. This patch series is a suggestion. Maybe there are better approaches like arch/mips/cpu/{mips4k|mips5k|mips24k|...|octeon}. > >> code resides in the global arch/mips/cpu directory. This is not >> suitable if other Mips architectures like Mips64 or Octeon should >> be supported in the future. > > Just for the record. > > Personally, Octeon is sort of a special case. It's based on MIPS64 > architecture, and definitely a MIPS SoC, but not usual MIPS machine. > As Aaron already mentioned before, we have very few files sharable > with other MIPS machines even in the Linux kernel case. I think it > will take long time the Octeon port gets merged to upstream, regard- > less of my opinions, because they have a lot of things need to be > resolved prior to Octeon itself. My original intention was cleaning up the MIPS CPU directory as preparation to support new SoCs. I included this patch because Aaron asked for this separation some weeks ago but no one answered or commented ;) However I posted this series to get some feedback if such a change is wanted or acceptable. If so I prepare a new patch series. At least I hope the SoC separation is acceptable. Cheers, Daniel
Dear Daniel Schwierzeck, In message <4D7C147A.5060501@gmail.com> you wrote: > > >> All current CPUs and SoCs are based on Mips32 arch. The complete > > > > Is that true? What about purple SoC? IIUC It's based on MIPS 5Kc > > and capable of 64-bit, which MIPS32 is 32-bit only architecture. > > that was an assumption. I could not find any information about Purple. > This patch series is a suggestion. Maybe there are better approaches > like arch/mips/cpu/{mips4k|mips5k|mips24k|...|octeon}. Purple is (better: was) indeed a 64 bit system. OTOH, the purple board has not been actively maintained for several years, and I'm not aware of anybody who still has access to the hardware. If it should cause trouble, it would probably most appropriate to drop the purple support. Best regards, Wolfgang Denk
Hello Wolfgang, 2011/3/13 Wolfgang Denk <wd@denx.de>: > Dear Daniel Schwierzeck, > > In message <4D7C147A.5060501@gmail.com> you wrote: >> >> >> All current CPUs and SoCs are based on Mips32 arch. The complete >> > >> > Is that true? What about purple SoC? IIUC It's based on MIPS 5Kc >> > and capable of 64-bit, which MIPS32 is 32-bit only architecture. >> >> that was an assumption. I could not find any information about Purple. >> This patch series is a suggestion. Maybe there are better approaches >> like arch/mips/cpu/{mips4k|mips5k|mips24k|...|octeon}. > > Purple is (better: was) indeed a 64 bit system. > > OTOH, the purple board has not been actively maintained for several > years, and I'm not aware of anybody who still has access to the > hardware. If it should cause trouble, it would probably most > appropriate to drop the purple support. > shall I include an additional patch that drops Purple support and do you agree to the refactoring of the CPU directory itself? Best regards, Daniel
Dear Daniel Schwierzeck, In message <AANLkTinP-3rVXVKcxi8_XTra8mKoBzTV88Vu2t1YkP+q@mail.gmail.com> you wrote: > > > OTOH, the purple board has not been actively maintained for several > > years, and I'm not aware of anybody who still has access to the > > hardware. =C2=A0If it should cause trouble, it would probably most > > appropriate to drop the purple support. > > shall I include an additional patch that drops Purple support and do you agree Yes, please, if it reduces the effort for you now. > to the refactoring of the CPU directory itself? Sorry, I didn't have much time to read it / think about it yet. Best regards, Wolfgang Denk
Seperating the SOCs solves most of my problems with the exception of board.c, but then again, we're rather a special case there due to some of the stuff we do. Not counting our SDK we have around 27Kloc for our platform, a large chunk of that being DDR2/3 memory initialization code. Our SDK currently weighs in at 764Kloc, most of which isn't needed by U-Boot (lots of autogenerated hardware definition files for all our chips). -Aaron On Saturday, March 12, 2011 04:48:58 PM Daniel Schwierzeck wrote: > Hi Shinya, > > On 03/12/2011 03:43 PM, Shinya Kuribayashi wrote: > > On 3/9/11 10:16 PM, daniel.schwierzeck@googlemail.com wrote: > >> All current CPUs and SoCs are based on Mips32 arch. The complete > > > > Is that true? What about purple SoC? IIUC It's based on MIPS 5Kc > > and capable of 64-bit, which MIPS32 is 32-bit only architecture. > > that was an assumption. I could not find any information about Purple. > This patch series is a suggestion. Maybe there are better approaches > like arch/mips/cpu/{mips4k|mips5k|mips24k|...|octeon}. > > >> code resides in the global arch/mips/cpu directory. This is not > >> suitable if other Mips architectures like Mips64 or Octeon should > >> be supported in the future. > > > > Just for the record. > > > > Personally, Octeon is sort of a special case. It's based on MIPS64 > > architecture, and definitely a MIPS SoC, but not usual MIPS machine. > > As Aaron already mentioned before, we have very few files sharable > > with other MIPS machines even in the Linux kernel case. I think it > > will take long time the Octeon port gets merged to upstream, regard- > > less of my opinions, because they have a lot of things need to be > > resolved prior to Octeon itself. > > My original intention was cleaning up the MIPS CPU directory as > preparation to support new SoCs. I included this patch because Aaron > asked for this separation some weeks ago but no one answered or commented > ;) However I posted this series to get some feedback if such a change is > wanted or acceptable. If so I prepare a new patch series. At least I hope > the SoC separation is acceptable. > > Cheers, > Daniel
diff --git a/arch/mips/cpu/Makefile b/arch/mips/cpu/mips32/Makefile similarity index 100% rename from arch/mips/cpu/Makefile rename to arch/mips/cpu/mips32/Makefile diff --git a/arch/mips/cpu/asc_serial.c b/arch/mips/cpu/mips32/asc_serial.c similarity index 100% rename from arch/mips/cpu/asc_serial.c rename to arch/mips/cpu/mips32/asc_serial.c diff --git a/arch/mips/cpu/asc_serial.h b/arch/mips/cpu/mips32/asc_serial.h similarity index 100% rename from arch/mips/cpu/asc_serial.h rename to arch/mips/cpu/mips32/asc_serial.h diff --git a/arch/mips/cpu/au1x00_eth.c b/arch/mips/cpu/mips32/au1x00_eth.c similarity index 100% rename from arch/mips/cpu/au1x00_eth.c rename to arch/mips/cpu/mips32/au1x00_eth.c diff --git a/arch/mips/cpu/au1x00_serial.c b/arch/mips/cpu/mips32/au1x00_serial.c similarity index 100% rename from arch/mips/cpu/au1x00_serial.c rename to arch/mips/cpu/mips32/au1x00_serial.c diff --git a/arch/mips/cpu/au1x00_usb_ohci.c b/arch/mips/cpu/mips32/au1x00_usb_ohci.c similarity index 100% rename from arch/mips/cpu/au1x00_usb_ohci.c rename to arch/mips/cpu/mips32/au1x00_usb_ohci.c diff --git a/arch/mips/cpu/au1x00_usb_ohci.h b/arch/mips/cpu/mips32/au1x00_usb_ohci.h similarity index 100% rename from arch/mips/cpu/au1x00_usb_ohci.h rename to arch/mips/cpu/mips32/au1x00_usb_ohci.h diff --git a/arch/mips/cpu/cache.S b/arch/mips/cpu/mips32/cache.S similarity index 100% rename from arch/mips/cpu/cache.S rename to arch/mips/cpu/mips32/cache.S diff --git a/arch/mips/cpu/config.mk b/arch/mips/cpu/mips32/config.mk similarity index 100% rename from arch/mips/cpu/config.mk rename to arch/mips/cpu/mips32/config.mk diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/mips32/cpu.c similarity index 100% rename from arch/mips/cpu/cpu.c rename to arch/mips/cpu/mips32/cpu.c diff --git a/arch/mips/cpu/incaip_clock.c b/arch/mips/cpu/mips32/incaip_clock.c similarity index 100% rename from arch/mips/cpu/incaip_clock.c rename to arch/mips/cpu/mips32/incaip_clock.c diff --git a/arch/mips/cpu/incaip_wdt.S b/arch/mips/cpu/mips32/incaip_wdt.S similarity index 100% rename from arch/mips/cpu/incaip_wdt.S rename to arch/mips/cpu/mips32/incaip_wdt.S diff --git a/arch/mips/cpu/interrupts.c b/arch/mips/cpu/mips32/interrupts.c similarity index 100% rename from arch/mips/cpu/interrupts.c rename to arch/mips/cpu/mips32/interrupts.c diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/mips32/start.S similarity index 100% rename from arch/mips/cpu/start.S rename to arch/mips/cpu/mips32/start.S diff --git a/boards.cfg b/boards.cfg index 45c3102..8f63b6c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -217,32 +217,32 @@ M5282EVB m68k mcf52x2 m5282evb freesca M53017EVB m68k mcf52x2 m53017evb freescale EP2500 m68k mcf52x2 ep2500 Mercury microblaze-generic microblaze microblaze microblaze-generic xilinx -dbau1000 mips mips dbau1x00 - - dbau1x00:DBAU1000 -dbau1100 mips mips dbau1x00 - - dbau1x00:DBAU1100 -dbau1500 mips mips dbau1x00 - - dbau1x00:DBAU1500 -dbau1550 mips mips dbau1x00 - - dbau1x00:DBAU1550 -dbau1550_el mips mips dbau1x00 - - dbau1x00:DBAU1550 -gth2 mips mips -incaip mips mips -incaip_100MHz mips mips incaip - - incaip:CPU_CLOCK_RATE=100000000 -incaip_133MHz mips mips incaip - - incaip:CPU_CLOCK_RATE=133000000 -incaip_150MHz mips mips incaip - - incaip:CPU_CLOCK_RATE=150000000 -pb1000 mips mips pb1x00 - - pb1x00:PB1000 -purple mips mips -qemu_mips mips mips qemu-mips - - qemu-mips -tb0229 mips mips -vct_premium mips mips vct micronas - vct:VCT_PREMIUM -vct_premium_small mips mips vct micronas - vct:VCT_PREMIUM,VCT_SMALL_IMAGE -vct_premium_onenand mips mips vct micronas - vct:VCT_PREMIUM,VCT_ONENAND -vct_premium_onenand_small mips mips vct micronas - vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE -vct_platinum mips mips vct micronas - vct:VCT_PLATINUM -vct_platinum_small mips mips vct micronas - vct:VCT_PLATINUM,VCT_SMALL_IMAGE -vct_platinum_onenand mips mips vct micronas - vct:VCT_PLATINUM,VCT_ONENAND -vct_platinum_onenand_small mips mips vct micronas - vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE -vct_platinumavc mips mips vct micronas - vct:VCT_PLATINUMAVC -vct_platinumavc_small mips mips vct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE -vct_platinumavc_onenand mips mips vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND -vct_platinumavc_onenand_small mips mips vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE +dbau1000 mips mips32 dbau1x00 - - dbau1x00:DBAU1000 +dbau1100 mips mips32 dbau1x00 - - dbau1x00:DBAU1100 +dbau1500 mips mips32 dbau1x00 - - dbau1x00:DBAU1500 +dbau1550 mips mips32 dbau1x00 - - dbau1x00:DBAU1550 +dbau1550_el mips mips32 dbau1x00 - - dbau1x00:DBAU1550 +gth2 mips mips32 +incaip mips mips32 +incaip_100MHz mips mips32 incaip - - incaip:CPU_CLOCK_RATE=100000000 +incaip_133MHz mips mips32 incaip - - incaip:CPU_CLOCK_RATE=133000000 +incaip_150MHz mips mips32 incaip - - incaip:CPU_CLOCK_RATE=150000000 +pb1000 mips mips32 pb1x00 - - pb1x00:PB1000 +purple mips mips32 +qemu_mips mips mips32 qemu-mips - - qemu-mips +tb0229 mips mips32 +vct_premium mips mips32 vct micronas - vct:VCT_PREMIUM +vct_premium_small mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_SMALL_IMAGE +vct_premium_onenand mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_ONENAND +vct_premium_onenand_small mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE +vct_platinum mips mips32 vct micronas - vct:VCT_PLATINUM +vct_platinum_small mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_SMALL_IMAGE +vct_platinum_onenand mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_ONENAND +vct_platinum_onenand_small mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE +vct_platinumavc mips mips32 vct micronas - vct:VCT_PLATINUMAVC +vct_platinumavc_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE +vct_platinumavc_onenand mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND +vct_platinumavc_onenand_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE PCI5441 nios2 nios2 pci5441 psyent PK1C20 nios2 nios2 pk1c20 psyent EVB64260 powerpc 74xx_7xx evb64260 - - EVB64260
All current CPUs and SoCs are based on Mips32 arch. The complete code resides in the global arch/mips/cpu directory. This is not suitable if other Mips architectures like Mips64 or Octeon should be supported in the future. To achieve this the current CPU code is moved to its own mips32 subdirectory. All Mips32 boards have to use mips32 as config switch in board.cfg. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Shinya Kuribayashi <skuribay@pobox.com> --- arch/mips/cpu/{ => mips32}/Makefile | 0 arch/mips/cpu/{ => mips32}/asc_serial.c | 0 arch/mips/cpu/{ => mips32}/asc_serial.h | 0 arch/mips/cpu/{ => mips32}/au1x00_eth.c | 0 arch/mips/cpu/{ => mips32}/au1x00_serial.c | 0 arch/mips/cpu/{ => mips32}/au1x00_usb_ohci.c | 0 arch/mips/cpu/{ => mips32}/au1x00_usb_ohci.h | 0 arch/mips/cpu/{ => mips32}/cache.S | 0 arch/mips/cpu/{ => mips32}/config.mk | 0 arch/mips/cpu/{ => mips32}/cpu.c | 0 arch/mips/cpu/{ => mips32}/incaip_clock.c | 0 arch/mips/cpu/{ => mips32}/incaip_wdt.S | 0 arch/mips/cpu/{ => mips32}/interrupts.c | 0 arch/mips/cpu/{ => mips32}/start.S | 0 boards.cfg | 52 +++++++++++++------------- 15 files changed, 26 insertions(+), 26 deletions(-) rename arch/mips/cpu/{ => mips32}/Makefile (100%) rename arch/mips/cpu/{ => mips32}/asc_serial.c (100%) rename arch/mips/cpu/{ => mips32}/asc_serial.h (100%) rename arch/mips/cpu/{ => mips32}/au1x00_eth.c (100%) rename arch/mips/cpu/{ => mips32}/au1x00_serial.c (100%) rename arch/mips/cpu/{ => mips32}/au1x00_usb_ohci.c (100%) rename arch/mips/cpu/{ => mips32}/au1x00_usb_ohci.h (100%) rename arch/mips/cpu/{ => mips32}/cache.S (100%) rename arch/mips/cpu/{ => mips32}/config.mk (100%) rename arch/mips/cpu/{ => mips32}/cpu.c (100%) rename arch/mips/cpu/{ => mips32}/incaip_clock.c (100%) rename arch/mips/cpu/{ => mips32}/incaip_wdt.S (100%) rename arch/mips/cpu/{ => mips32}/interrupts.c (100%) rename arch/mips/cpu/{ => mips32}/start.S (100%) -- 1.7.4.1