| Message ID | 1529479662-4026-4-git-send-email-absahu@codeaurora.org |
|---|---|
| State | Accepted |
| Delegated to: | Miquel Raynal |
| Headers | show |
| Series | Update for QCOM NAND driver | expand |
On Wed, Jun 20, 2018 at 12:57:30PM +0530, Abhishek Sahu wrote: > 1. If nand-ecc-strength specified in DT, then controller will use > this ECC strength otherwise ECC strength will be calculated > according to chip requirement and available OOB size. > > 2. QCOM NAND controller supports only one step size (512 bytes) but > nand-ecc-step-size is required property in DT. This DT property > can be removed and ecc step size can be assigned in driver with > 512 bytes value. > > Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> > --- > > * Changes from v3: > > 1. Clubbed following 2 patches into one > https://patchwork.ozlabs.org/patch/920465/ > https://patchwork.ozlabs.org/patch/920467/ > > * Changes from v2: > NONE > > * Changes from v1: > NEW PATCH > > Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt index 73d336be..1123cc6 100644 --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt @@ -45,11 +45,12 @@ Required properties: number (e.g., 0, 1, 2, etc.) - #address-cells: see partition.txt - #size-cells: see partition.txt -- nand-ecc-strength: see nand.txt -- nand-ecc-step-size: must be 512. see nand.txt for more details. Optional properties: - nand-bus-width: see nand.txt +- nand-ecc-strength: see nand.txt. If not specified, then ECC strength will + be used according to chip requirement and available + OOB size. Each nandcs device node may optionally contain a 'partitions' sub-node, which further contains sub-nodes describing the flash partition mapping. See @@ -77,7 +78,6 @@ nand-controller@1ac00000 { reg = <0>; nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; nand-bus-width = <8>; partitions { @@ -117,7 +117,6 @@ nand-controller@79b0000 { nand@0 { reg = <0>; nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; nand-bus-width = <8>; partitions {
1. If nand-ecc-strength specified in DT, then controller will use this ECC strength otherwise ECC strength will be calculated according to chip requirement and available OOB size. 2. QCOM NAND controller supports only one step size (512 bytes) but nand-ecc-step-size is required property in DT. This DT property can be removed and ecc step size can be assigned in driver with 512 bytes value. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> --- * Changes from v3: 1. Clubbed following 2 patches into one https://patchwork.ozlabs.org/patch/920465/ https://patchwork.ozlabs.org/patch/920467/ * Changes from v2: NONE * Changes from v1: NEW PATCH Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)