diff mbox series

[U-Boot,9/9] ARM: dts: rk322x: Correct the uart2 default pin configuration

Message ID 1517641069-30717-1-git-send-email-david.wu@rock-chips.com
State Changes Requested
Delegated to: Philipp Tomsich
Headers show
Series Add common pinctrl driver support for rockchip | expand

Commit Message

David Wu Feb. 3, 2018, 6:57 a.m. UTC
To match the iomux setting of uart2 at SPL, correct the uart2
default pin configuration, if not changed, the evb-rk3229 can't
output the log message.

Signed-off-by: David Wu <david.wu@rock-chips.com>
---

 arch/arm/dts/rk322x.dtsi | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

Comments

Philipp Tomsich Feb. 9, 2018, 10:13 a.m. UTC | #1
> To match the iomux setting of uart2 at SPL, correct the uart2
> default pin configuration, if not changed, the evb-rk3229 can't
> output the log message.
> 
> Signed-off-by: David Wu <david.wu@rock-chips.com>
> ---
> 
>  arch/arm/dts/rk322x.dtsi | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 

Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich Feb. 9, 2018, 10:15 a.m. UTC | #2
> To match the iomux setting of uart2 at SPL, correct the uart2
> default pin configuration, if not changed, the evb-rk3229 can't
> output the log message.
> 
> Signed-off-by: David Wu <david.wu@rock-chips.com>
> ---
> 
>  arch/arm/dts/rk322x.dtsi | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
diff mbox series

Patch

diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 22324f9..023ced6 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -207,7 +207,7 @@ 
 		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
 		clock-names = "baudclk", "apb_pclk";
 		pinctrl-names = "default";
-		pinctrl-0 = <&uart2_xfer>;
+		pinctrl-0 = <&uart21_xfer>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		status = "disabled";
@@ -749,7 +749,7 @@ 
 
 		uart2 {
 			uart2_xfer: uart2-xfer {
-				rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_none>,
+				rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up>,
 						<1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
 			};
 
@@ -761,6 +761,13 @@ 
 				rockchip,pins = <0 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
 			};
 		};
+
+		uart2-1 {
+			uart21_xfer: uart21-xfer {
+				rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>,
+						<1 9 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
 	};
 
 	dmc: dmc@11200000 {