| Message ID | 008a01cbae68$7054f980$6401a8c0@LENOVOE5CA6843 |
|---|---|
| State | Changes Requested |
| Headers | show |
On Fri, 7 Jan 2011 20:42:51 +0800 Baidu Boy <liucai.lfn@gmail.com> wrote: > Signed-off-by: Baidu Boy <liucai.lfn@gmail.com> Sign-offs (and ideally the From: field as well) should contain your real name. > diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c > index 46a706d..2a200b8 100644 > --- a/arch/powerpc/cpu/mpc83xx/pcie.c > +++ b/arch/powerpc/cpu/mpc83xx/pcie.c > @@ -46,13 +46,15 @@ static struct { > #endif > }; > > +static u8 pcie_index =0; > + > #ifdef CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES > > static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev) > { > int bus = PCI_BUS(dev) - hose->first_busno; > immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; > - pex83xx_t *pex = &immr->pciexp[bus]; > + pex83xx_t *pex = &immr->pciexp[pcie_index]; Maybe struct pci_controller should contain a field for the driver's private use, where such things could be placed? > struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0]; > u8 devfn = PCI_DEV(dev) << 3 | PCI_FUNC(dev); > u32 dev_base = bus << 24 | devfn << 16; > @@ -324,6 +326,8 @@ void mpc83xx_pcie_init(int num_buses, struct pci_region **reg) > num_buses = ARRAY_SIZE(mpc83xx_pcie_cfg_space); > } > > - for (i = 0; i < num_buses; i++) > + for (i = 0; i < num_buses; i++){ > + pcie_index = i; > mpc83xx_pcie_init_bus(i, reg[i]); > + } > } Won't this break if config space is accessed after initializion? -Scott
Hello. On 07-01-2011 15:42, Baidu Boy wrote: > This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller > is connected with switch or we use both of the two pcie controller. > Signed-off-by: Baidu Boy<liucai.lfn@gmail.com> > --- > Changes for v2: > - Avoid line wrap in the patch > arch/powerpc/cpu/mpc83xx/pcie.c | 8 ++++++-- > 1 files changed, 6 insertions(+), 2 deletions(-) > diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c > index 46a706d..2a200b8 100644 > --- a/arch/powerpc/cpu/mpc83xx/pcie.c > +++ b/arch/powerpc/cpu/mpc83xx/pcie.c [...] > @@ -324,6 +326,8 @@ void mpc83xx_pcie_init(int num_buses, struct pci_region **reg) > num_buses = ARRAY_SIZE(mpc83xx_pcie_cfg_space); > } > > - for (i = 0; i< num_buses; i++) > + for (i = 0; i< num_buses; i++){ There should be space between ) and {. > + pcie_index = i; > mpc83xx_pcie_init_bus(i, reg[i]); > + } > } WBR, Sergei
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index 46a706d..2a200b8 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -46,13 +46,15 @@ static struct { #endif }; +static u8 pcie_index =0; + #ifdef CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev) { int bus = PCI_BUS(dev) - hose->first_busno; immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; - pex83xx_t *pex = &immr->pciexp[bus]; + pex83xx_t *pex = &immr->pciexp[pcie_index]; struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0]; u8 devfn = PCI_DEV(dev) << 3 | PCI_FUNC(dev); u32 dev_base = bus << 24 | devfn << 16; @@ -324,6 +326,8 @@ void mpc83xx_pcie_init(int num_buses, struct pci_region **reg) num_buses = ARRAY_SIZE(mpc83xx_pcie_cfg_space); } - for (i = 0; i < num_buses; i++) + for (i = 0; i < num_buses; i++){ + pcie_index = i; mpc83xx_pcie_init_bus(i, reg[i]); + } }
This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller. Signed-off-by: Baidu Boy <liucai.lfn@gmail.com> --- Changes for v2: - Avoid line wrap in the patch arch/powerpc/cpu/mpc83xx/pcie.c | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-)