| Message ID | 1294152639-27552-1-git-send-email-leiwen@marvell.com |
|---|---|
| State | Superseded |
| Delegated to: | Prafulla Wadaskar |
| Headers | show |
This patch set is based on previous Prafulla armada100 soc support patch set. It add Marvell Pantheon SOC and dkb board support and do some clean up. [PATCH 1/6] Armada100: change the definition place for apb and mpmu [PATCH 2/6] mv: seperate kirkwood and mmp from common setting [PATCH 3/6] ARM: Add Support for Marvell Pantheon Familiy SoCs [PATCH 4/6] serial: add pantheon soc support [PATCH 5/6] mvmfp: add MFP configuration support for PANTHEON [PATCH 6/6] Pantheon: Add Board Support for Marvell dkb board
> -----Original Message----- > From: Lei Wen [mailto:leiwen@marvell.com] > Sent: Tuesday, January 04, 2011 8:21 PM > To: u-boot@lists.denx.de; Prafulla Wadaskar; Yu Tang; Ashish Karkare; > Prabhanjan Sarnaik; adrian.wenl@gmail.com > Subject: [U-BOOT] [PATCH 6/6] Pantheon: Add Board Support for Marvell > dkb board > > This patch set is based on previous Prafulla armada100 soc support > patch set. It add Marvell Pantheon SOC and dkb board support and do > some clean up. > > [PATCH 1/6] Armada100: change the definition place for apb and mpmu > [PATCH 2/6] mv: seperate kirkwood and mmp from common setting > [PATCH 3/6] ARM: Add Support for Marvell Pantheon Familiy SoCs > [PATCH 4/6] serial: add pantheon soc support > [PATCH 5/6] mvmfp: add MFP configuration support for PANTHEON > [PATCH 6/6] Pantheon: Add Board Support for Marvell dkb board Hi Lei You should generate patch series with "git-format-patch -n --cover-letter" options to get cover letter (this email) in right format. Regards.. Prafulla . .
> -----Original Message----- > From: Lei Wen [mailto:leiwen@marvell.com] > Sent: Tuesday, January 04, 2011 8:21 PM > To: u-boot@lists.denx.de; Prafulla Wadaskar; Yu Tang; Ashish Karkare; > Prabhanjan Sarnaik; adrian.wenl@gmail.com > Subject: [U-BOOT] [PATCH 1/6] Armada100: change the definition place for > apb and mpmu > > cpu.h should be better place to hold the structure definiton. > Our intend is to make <soc>.h as a place only hold register base > address. Dear Lei. This seems to be a standalone patch You can keep this patch separate so that it can be discussed, agreed and applied irrespective of this patch series. Regards.. Prafulla . .
Hi Prafulla, On Wed, Jan 5, 2011 at 5:24 PM, Prafulla Wadaskar <prafulla@marvell.com> wrote: > > >> -----Original Message----- >> From: Lei Wen [mailto:leiwen@marvell.com] >> Sent: Tuesday, January 04, 2011 8:21 PM >> To: u-boot@lists.denx.de; Prafulla Wadaskar; Yu Tang; Ashish Karkare; >> Prabhanjan Sarnaik; adrian.wenl@gmail.com >> Subject: [U-BOOT] [PATCH 1/6] Armada100: change the definition place for >> apb and mpmu >> >> cpu.h should be better place to hold the structure definiton. >> Our intend is to make <soc>.h as a place only hold register base >> address. > > Dear Lei. > This seems to be a standalone patch > You can keep this patch separate so that it can be discussed, agreed and applied irrespective of this patch series. > Got that... I would seperate it out from current patch set. Best regards, Lei
diff --git a/arch/arm/include/asm/arch-armada100/armada100.h b/arch/arm/include/asm/arch-armada100/armada100.h index d5d125a..5b709ba 100644 --- a/arch/arm/include/asm/arch-armada100/armada100.h +++ b/arch/arm/include/asm/arch-armada100/armada100.h @@ -60,62 +60,5 @@ #define ARMD1_APMU_BASE 0xD4282800 #define ARMD1_CPU_BASE 0xD4282C00 -/* - * Main Power Management (MPMU) Registers - * Refer Datasheet Appendix A.8 - */ -struct armd1mpmu_registers { - u8 pad0[0x08 - 0x00]; - u32 fccr; /*0x0008*/ - u32 pocr; /*0x000c*/ - u32 posr; /*0x0010*/ - u32 succr; /*0x0014*/ - u8 pad1[0x030 - 0x014 - 4]; - u32 gpcr; /*0x0030*/ - u8 pad2[0x200 - 0x030 - 4]; - u32 wdtpcr; /*0x0200*/ - u8 pad3[0x1000 - 0x200 - 4]; - u32 apcr; /*0x1000*/ - u32 apsr; /*0x1004*/ - u8 pad4[0x1020 - 0x1004 - 4]; - u32 aprr; /*0x1020*/ - u32 acgr; /*0x1024*/ - u32 arsr; /*0x1028*/ -}; - -/* - * APB1 Clock Reset/Control Registers - * Refer Datasheet Appendix A.10 - */ -struct armd1apb1_registers { - u32 uart1; /*0x000*/ - u32 uart2; /*0x004*/ - u32 gpio; /*0x008*/ - u32 pwm1; /*0x00c*/ - u32 pwm2; /*0x010*/ - u32 pwm3; /*0x014*/ - u32 pwm4; /*0x018*/ - u8 pad0[0x028 - 0x018 - 4]; - u32 rtc; /*0x028*/ - u32 twsi0; /*0x02c*/ - u32 kpc; /*0x030*/ - u32 timers; /*0x034*/ - u8 pad1[0x03c - 0x034 - 4]; - u32 aib; /*0x03c*/ - u32 sw_jtag; /*0x040*/ - u32 timer1; /*0x044*/ - u32 onewire; /*0x048*/ - u8 pad2[0x050 - 0x048 - 4]; - u32 asfar; /*0x050 AIB Secure First Access Reg*/ - u32 assar; /*0x054 AIB Secure Second Access Reg*/ - u8 pad3[0x06c - 0x054 - 4]; - u32 twsi1; /*0x06c*/ - u32 uart3; /*0x070*/ - u8 pad4[0x07c - 0x070 - 4]; - u32 timer2; /*0x07C*/ - u8 pad5[0x084 - 0x07c - 4]; - u32 ac97; /*0x084*/ -}; - #endif /* CONFIG_ARMADA100 */ #endif /* _ASM_ARCH_ARMADA100_H */ diff --git a/arch/arm/include/asm/arch-armada100/cpu.h b/arch/arm/include/asm/arch-armada100/cpu.h index 0518a6a..b07ba91 100644 --- a/arch/arm/include/asm/arch-armada100/cpu.h +++ b/arch/arm/include/asm/arch-armada100/cpu.h @@ -50,4 +50,61 @@ struct armd1cpu_registers { u32 armd1_sdram_base(int); u32 armd1_sdram_size(int); +/* + * Main Power Management (MPMU) Registers + * Refer Datasheet Appendix A.8 + */ +struct armd1mpmu_registers { + u8 pad0[0x08 - 0x00]; + u32 fccr; /*0x0008*/ + u32 pocr; /*0x000c*/ + u32 posr; /*0x0010*/ + u32 succr; /*0x0014*/ + u8 pad1[0x030 - 0x014 - 4]; + u32 gpcr; /*0x0030*/ + u8 pad2[0x200 - 0x030 - 4]; + u32 wdtpcr; /*0x0200*/ + u8 pad3[0x1000 - 0x200 - 4]; + u32 apcr; /*0x1000*/ + u32 apsr; /*0x1004*/ + u8 pad4[0x1020 - 0x1004 - 4]; + u32 aprr; /*0x1020*/ + u32 acgr; /*0x1024*/ + u32 arsr; /*0x1028*/ +}; + +/* + * APB1 Clock Reset/Control Registers + * Refer Datasheet Appendix A.10 + */ +struct armd1apb1_registers { + u32 uart1; /*0x000*/ + u32 uart2; /*0x004*/ + u32 gpio; /*0x008*/ + u32 pwm1; /*0x00c*/ + u32 pwm2; /*0x010*/ + u32 pwm3; /*0x014*/ + u32 pwm4; /*0x018*/ + u8 pad0[0x028 - 0x018 - 4]; + u32 rtc; /*0x028*/ + u32 twsi0; /*0x02c*/ + u32 kpc; /*0x030*/ + u32 timers; /*0x034*/ + u8 pad1[0x03c - 0x034 - 4]; + u32 aib; /*0x03c*/ + u32 sw_jtag; /*0x040*/ + u32 timer1; /*0x044*/ + u32 onewire; /*0x048*/ + u8 pad2[0x050 - 0x048 - 4]; + u32 asfar; /*0x050 AIB Secure First Access Reg*/ + u32 assar; /*0x054 AIB Secure Second Access Reg*/ + u8 pad3[0x06c - 0x054 - 4]; + u32 twsi1; /*0x06c*/ + u32 uart3; /*0x070*/ + u8 pad4[0x07c - 0x070 - 4]; + u32 timer2; /*0x07C*/ + u8 pad5[0x084 - 0x07c - 4]; + u32 ac97; /*0x084*/ +}; + #endif /* _ARMADA100CPU_H */
cpu.h should be better place to hold the structure definiton. Our intend is to make <soc>.h as a place only hold register base address. Signed-off-by: Lei Wen <leiwen@marvell.com> --- arch/arm/include/asm/arch-armada100/armada100.h | 57 ----------------------- arch/arm/include/asm/arch-armada100/cpu.h | 57 +++++++++++++++++++++++ 2 files changed, 57 insertions(+), 57 deletions(-)