Status update

Message ID	20100629172522.GA8227@localhost
State	New
Headers	show Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:date:from:to:cc:subject:message-id:mime-version:content-type :content-disposition:user-agent; b=V0op1q4sRX5jTJfopCbfvQPhB1HUKp26KlxNsFujXGqmdr4UzL3O/2L/hWiftEsTyv pWhK8b4eTaUZ7LckbAKugIWm6Lvjphk1UvEy3Acbyz7w9RfPQZZbZoxNnAanHP3FgLot BZipMdTk2cPNqtDbjaWBh6UYbozFUIXamZwiU= Date: Tue, 29 Jun 2010 20:25:22 +0300 From: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro> To: joro@8bytes.org Message-ID: <20100629172522.GA8227@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-06-14) Cc: qemu-devel@nongnu.org, paul@codesourcery.com, kvm@vger.kernel.org, avi@redhat.com Subject: [Qemu-devel] Status update Precedence: list Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org

diff --git a/hw/iommu.c b/hw/iommu.c new file mode 100644 index 0000000..410c88c --- /dev/null +++ b/hw/iommu.c @@ -0,0 +1,83 @@ +/* + * IOMMU layer + * + * Copyright (c) 2010 Eduard - Gabriel Munteanu + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include <errno.h> + +#include "iommu.h" + +struct iommu *iommu_get(DeviceState *dev, DeviceState **real_dev) +{ + BusState *bus; + + while (dev) { + bus = dev->parent_bus; + if (!bus) + goto out; + + if (bus->iommu) { + *real_dev = dev; + return bus->iommu; + } + + dev = bus->parent; + } + +out: + *real_dev = NULL; + return NULL; +} + +int __iommu_rw(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + uint8_t *buf, + int len, + int is_write) +{ + int plen, err; + target_phys_addr_t paddr; + unsigned perms; + + if (!is_write) + perms = IOMMU_PERM_READ; + else + perms = IOMMU_PERM_WRITE; + + do { + err = iommu->translate(iommu, dev, addr, &paddr, &plen, perms); + if (err) + return err; + if (plen > len) + plen = len; + + cpu_physical_memory_rw(paddr, buf, plen, is_write); + + len -= plen; + addr += plen; + buf += plen; + } while (len); + + return 0; +} + diff --git a/hw/iommu.h b/hw/iommu.h index cb51a6e..01978ab 100644 --- a/hw/iommu.h +++ b/hw/iommu.h @@ -1,8 +1,204 @@ #ifndef QEMU_IOMMU_H #define QEMU_IOMMU_H -#include <targphys.h> +#include "pci.h" +#include "targphys.h" +#include "qdev.h" -extern target_phys_addr_t iommu_translate(int bdf, target_phys_addr_t addr); +/* Don't use directly. */ +struct iommu { + void *opaque; + + void (*register_device)(struct iommu *iommu, + DeviceState *dev); + int (*translate)(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + target_phys_addr_t *paddr, + int *len, + unsigned perms); + int (*start_transaction)(struct iommu *iommu, + DeviceState *dev); + void (*end_transaction)(struct iommu *iommu, + DeviceState *dev); +}; + +#define IOMMU_PERM_READ (1 << 0) +#define IOMMU_PERM_WRITE (1 << 1) + +#define IOMMU_PERM_RW (IOMMU_PERM_READ | IOMMU_PERM_WRITE) + +static inline int iommu_nop_translate(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + target_phys_addr_t *paddr, + int *len, + unsigned perms) +{ + *paddr = addr; + *len = INT_MAX; + + return 0; +} + +static inline int iommu_nop_rw(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + uint8_t *buf, + int len, + int is_write) +{ + cpu_physical_memory_rw(addr, buf, len, is_write); + + return 0; +} + +static inline int iommu_register_device(struct iommu *iommu, + DeviceState *dev) +{ + if (iommu && iommu->register_device) + iommu->register_device(iommu, dev); + + return 0; +} + +#ifdef CONFIG_IOMMU + +extern struct iommu *iommu_get(DeviceState *dev, DeviceState **real_dev); + +/** + * Translates an address for the given device and performs access checking. + * + * Defined in implementation-specific IOMMU code. + * + * @iommu IOMMU + * @dev qdev device + * @addr address to be translated + * @paddr translated address + * @len number of bytes for which the translation is valid + * @rw read or write? + * + * Returns 0 iff translation and access checking succeeded. + */ +static inline int iommu_translate(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + target_phys_addr_t *paddr, + int *len, + unsigned perms) +{ + if (iommu && iommu->translate) + return iommu->translate(iommu, dev, addr, paddr, len, perms); + + return iommu_nop_translate(iommu, dev, addr, paddr, len, perms); +} + +extern int __iommu_rw(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + uint8_t *buf, + int len, + int is_write); + +/** + * Performs I/O with address translation and access checking. + * + * Defined in generic IOMMU code. + * + * @iommu IOMMU + * @dev qdev device + * @addr address where to perform I/O + * @buf buffer to read from or write to + * @len length of the operation + * @rw read or write? + * + * Returns 0 iff the I/O operation succeeded. + */ +static inline int iommu_rw(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + uint8_t *buf, + int len, + int is_write) +{ + if (iommu && iommu->translate) + return __iommu_rw(iommu, dev, addr, buf, len, is_write); + + return iommu_nop_rw(iommu, dev, addr, buf, len, is_write); +} + +static inline int iommu_start_transaction(struct iommu *iommu, + DeviceState *dev) +{ + if (iommu && iommu->start_transaction) + return iommu->start_transaction(iommu, dev); + + return 0; +} + +static inline void iommu_end_transaction(struct iommu *iommu, + DeviceState *dev) +{ + if (iommu && iommu->end_transaction) + iommu->end_transaction(iommu, dev); +} + +#else /* CONFIG_IOMMU */ + +static inline struct iommu *iommu_get(DeviceState *dev, DeviceState **real_dev) +{ + return NULL; +} + +static inline int iommu_translate(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + target_phys_addr_t *paddr, + int *len, + unsigned perms) +{ + return iommu_nop_translate(iommu, dev, addr, paddr, len, perms); +} + +static inline int iommu_rw(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + uint8_t *buf, + int len, + int is_write) +{ + return iommu_nop_rw(iommu, dev, addr, buf, len, is_write); +} + +static inline int iommu_start_transaction(struct iommu *iommu, + DeviceState *dev) +{ + return 0; +} + +static inline void iommu_end_transaction(struct iommu *iommu, + DeviceState *dev) +{ +} + +#endif /* CONFIG_IOMMU */ + +static inline int iommu_read(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + uint8_t *buf, + int len) +{ + return iommu_rw(iommu, dev, addr, buf, len, 0); +} + +static inline int iommu_write(struct iommu *iommu, + DeviceState *dev, + target_phys_addr_t addr, + const uint8_t *buf, + int len) +{ + return iommu_rw(iommu, dev, addr, (uint8_t *) buf, len, 1); +} #endif diff --git a/hw/qdev.h b/hw/qdev.h index a44060e..6e1e633 100644 --- a/hw/qdev.h +++ b/hw/qdev.h @@ -56,6 +56,8 @@ struct BusInfo { Property *props; }; +struct iommu; + struct BusState { DeviceState *parent; BusInfo *info; @@ -64,6 +66,10 @@ struct BusState { int qdev_allocated; QLIST_HEAD(, DeviceState) children; QLIST_ENTRY(BusState) sibling; + +#ifdef CONFIG_IOMMU + struct iommu *iommu; +#endif }; struct Property {

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