{"id":908470,"url":"http://patchwork.ozlabs.org/api/patches/908470/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20180504030811.28111-11-peterx@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20180504030811.28111-11-peterx@redhat.com>","list_archive_url":null,"date":"2018-05-04T03:08:11","name":"[v2,10/10] intel-iommu: remove notify_unmap for page walk","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"479390b56ab5ee0744d91c02354fc25fccc19774","submitter":{"id":67717,"url":"http://patchwork.ozlabs.org/api/people/67717/?format=json","name":"Peter Xu","email":"peterx@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20180504030811.28111-11-peterx@redhat.com/mbox/","series":[{"id":42502,"url":"http://patchwork.ozlabs.org/api/series/42502/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=42502","date":"2018-05-04T03:08:01","name":"intel-iommu: nested vIOMMU, cleanups, bug fixes","version":2,"mbox":"http://patchwork.ozlabs.org/series/42502/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/908470/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/908470/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 40ccdQ3qjxz9s35\n\tfor ;\n\tFri, 4 May 2018 13:17:30 +1000 (AEST)","from localhost ([::1]:60208 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1fERDs-0008Hk-6U\n\tfor incoming@patchwork.ozlabs.org; Thu, 03 May 2018 23:17:28 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:33542)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1fER6C-0002ID-SO\n\tfor qemu-devel@nongnu.org; Thu, 03 May 2018 23:09:34 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1fER68-00061f-LV\n\tfor qemu-devel@nongnu.org; Thu, 03 May 2018 23:09:32 -0400","from mx3-rdu2.redhat.com ([66.187.233.73]:39294\n\thelo=mx1.redhat.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1fER68-00061R-FH\n\tfor qemu-devel@nongnu.org; Thu, 03 May 2018 23:09:28 -0400","from smtp.corp.redhat.com\n\t(int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 201FB818592A;\n\tFri, 4 May 2018 03:09:28 +0000 (UTC)","from xz-mi.redhat.com (ovpn-12-46.pek2.redhat.com [10.72.12.46])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 1179F11166E0;\n\tFri, 4 May 2018 03:09:17 +0000 (UTC)"],"From":"Peter Xu ","To":"qemu-devel@nongnu.org","Date":"Fri, 4 May 2018 11:08:11 +0800","Message-Id":"<20180504030811.28111-11-peterx@redhat.com>","In-Reply-To":"<20180504030811.28111-1-peterx@redhat.com>","References":"<20180504030811.28111-1-peterx@redhat.com>","X-Scanned-By":"MIMEDefang 2.78 on 10.11.54.3","X-Greylist":["Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.11.55.8]);\n\tFri, 04 May 2018 03:09:28 +0000 (UTC)","inspected by milter-greylist-4.5.16 (mx1.redhat.com\n\t[10.11.55.8]); \n\tFri, 04 May 2018 03:09:28 +0000 (UTC) for IP:'10.11.54.3'\n\tDOMAIN:'int-mx03.intmail.prod.int.rdu2.redhat.com'\n\tHELO:'smtp.corp.redhat.com' FROM:'peterx@redhat.com' RCPT:''"],"X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"66.187.233.73","Subject":"[Qemu-devel] [PATCH v2 10/10] intel-iommu: remove notify_unmap for\n\tpage walk","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Tian Kevin , \"Michael S . Tsirkin\" ,\n\tJason Wang , peterx@redhat.com,\n\tAlex Williamson ,\n\tJintack Lim ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Now after previous changes, we will always pass that parameter as true\nnow. Remove it. After removing that variable, now we can greatly\nsimplify the page walking logic.\n\nNo functional change at all.\n\nSigned-off-by: Peter Xu \n---\n hw/i386/intel_iommu.c | 70 +++++++++++++++++--------------------------\n hw/i386/trace-events | 1 -\n 2 files changed, 28 insertions(+), 43 deletions(-)","diff":"diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c\nindex 9439103cac..c156235135 100644\n--- a/hw/i386/intel_iommu.c\n+++ b/hw/i386/intel_iommu.c\n@@ -759,7 +759,6 @@ typedef struct {\n VTDAddressSpace *as;\n vtd_page_walk_hook hook_fn;\n void *private;\n- bool notify_unmap;\n } vtd_page_walk_info;\n \n static int vtd_page_walk_one(IOMMUTLBEntry *entry, int level,\n@@ -900,45 +899,34 @@ static int vtd_page_walk_level(dma_addr_t addr, uint64_t start,\n */\n entry_valid = read_cur | write_cur;\n \n- entry.target_as = &address_space_memory;\n- entry.iova = iova & subpage_mask;\n- entry.perm = IOMMU_ACCESS_FLAG(read_cur, write_cur);\n- entry.addr_mask = ~subpage_mask;\n-\n- if (vtd_is_last_slpte(slpte, level)) {\n- /* NOTE: this is only meaningful if entry_valid == true */\n- entry.translated_addr = vtd_get_slpte_addr(slpte, aw);\n- if (!entry_valid && !info->notify_unmap) {\n- trace_vtd_page_walk_skip_perm(iova, iova_next);\n- goto next;\n- }\n- ret = vtd_page_walk_one(&entry, level, info);\n- if (ret < 0) {\n- return ret;\n- }\n- } else {\n- if (!entry_valid) {\n- if (info->notify_unmap) {\n- /*\n- * The whole entry is invalid; unmap it all.\n- * Translated address is meaningless, zero it.\n- */\n- entry.translated_addr = 0x0;\n- ret = vtd_page_walk_one(&entry, level, info);\n- if (ret < 0) {\n- return ret;\n- }\n- } else {\n- trace_vtd_page_walk_skip_perm(iova, iova_next);\n- }\n- goto next;\n- }\n+ if (!vtd_is_last_slpte(slpte, level) && entry_valid) {\n+ /*\n+ * This is a valid PDE (or even bigger than PDE). We need\n+ * to walk one further level.\n+ */\n ret = vtd_page_walk_level(vtd_get_slpte_addr(slpte, aw),\n iova, MIN(iova_next, end), level - 1,\n read_cur, write_cur, info);\n- if (ret < 0) {\n- return ret;\n- }\n+ } else {\n+ /*\n+ * This means we are either:\n+ *\n+ * (1) the real page entry (either 4K page, or huge page)\n+ * (2) the whole range is invalid\n+ *\n+ * In either case, we send an IOTLB notification down.\n+ */\n+ entry.target_as = &address_space_memory;\n+ entry.iova = iova & subpage_mask;\n+ entry.perm = IOMMU_ACCESS_FLAG(read_cur, write_cur);\n+ entry.addr_mask = ~subpage_mask;\n+ /* NOTE: this is only meaningful if entry_valid == true */\n+ entry.translated_addr = vtd_get_slpte_addr(slpte, aw);\n+ ret = vtd_page_walk_one(&entry, level, info);\n+ }\n+\n+ if (ret < 0) {\n+ return ret;\n }\n \n next:\n@@ -960,7 +948,7 @@ next:\n */\n static int vtd_page_walk(VTDContextEntry *ce, uint64_t start, uint64_t end,\n vtd_page_walk_hook hook_fn, void *private,\n- bool notify_unmap, VTDAddressSpace *as)\n+ VTDAddressSpace *as)\n {\n dma_addr_t addr = vtd_ce_get_slpt_base(ce);\n uint32_t level = vtd_ce_get_level(ce);\n@@ -968,7 +956,6 @@ static int vtd_page_walk(VTDContextEntry *ce, uint64_t start, uint64_t end,\n vtd_page_walk_info info = {\n .hook_fn = hook_fn,\n .private = private,\n- .notify_unmap = notify_unmap,\n .as = as,\n };\n \n@@ -1542,7 +1529,7 @@ static void vtd_iotlb_page_invalidate_notify(IntelIOMMUState *s,\n */\n vtd_page_walk(&ce, addr, addr + size,\n vtd_page_invalidate_notify_hook,\n- (void *)&vtd_as->iommu, true, vtd_as);\n+ (void *)&vtd_as->iommu, vtd_as);\n } else {\n /*\n * For UNMAP-only notifiers, we don't need to walk the\n@@ -3013,8 +3000,7 @@ static void vtd_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)\n ce.hi, ce.lo);\n if (vtd_as_notify_mappings(vtd_as)) {\n /* This is required only for MAP typed notifiers */\n- vtd_page_walk(&ce, 0, ~0ULL, vtd_replay_hook, (void *)n, true,\n- vtd_as);\n+ vtd_page_walk(&ce, 0, ~0ULL, vtd_replay_hook, (void *)n, vtd_as);\n } else {\n vtd_address_space_unmap(vtd_as, n);\n }\ndiff --git a/hw/i386/trace-events b/hw/i386/trace-events\nindex 677f83420d..eb23ace5fb 100644\n--- a/hw/i386/trace-events\n+++ b/hw/i386/trace-events\n@@ -43,7 +43,6 @@ vtd_page_walk_one(uint32_t level, uint64_t iova, uint64_t gpa, uint64_t mask, in\n vtd_page_walk_one_skip_map(uint64_t iova, uint64_t mask, uint64_t start, uint64_t end) \"iova 0x%\"PRIx64\" mask 0x%\"PRIx64\" start 0x%\"PRIx64\" end 0x%\"PRIx64\n vtd_page_walk_one_skip_unmap(uint64_t iova, uint64_t mask) \"iova 0x%\"PRIx64\" mask 0x%\"PRIx64\n vtd_page_walk_skip_read(uint64_t iova, uint64_t next) \"Page walk skip iova 0x%\"PRIx64\" - 0x%\"PRIx64\" due to unable to read\"\n-vtd_page_walk_skip_perm(uint64_t iova, uint64_t next) \"Page walk skip iova 0x%\"PRIx64\" - 0x%\"PRIx64\" due to perm empty\"\n vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) \"Page walk skip iova 0x%\"PRIx64\" - 0x%\"PRIx64\" due to rsrv set\"\n vtd_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) \"Device %02x:%02x.%x switching address space (iommu enabled=%d)\"\n vtd_as_unmap_whole(uint8_t bus, uint8_t slot, uint8_t fn, uint64_t iova, uint64_t size) \"Device %02x:%02x.%x start 0x%\"PRIx64\" size 0x%\"PRIx64\n","prefixes":["v2","10/10"]}