{"id":819532,"url":"http://patchwork.ozlabs.org/api/patches/819532/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/150659510129.25889.17733386928036958909.stgit@aravinda/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<150659510129.25889.17733386928036958909.stgit@aravinda>","list_archive_url":null,"date":"2017-09-28T10:38:21","name":"[v5,5/6] ppc: spapr: Enable FWNMI capability","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"55ce88af9e5c0ecfc845e68838ef3e7e4d5354fe","submitter":{"id":18580,"url":"http://patchwork.ozlabs.org/api/people/18580/?format=json","name":"Aravinda Prasad","email":"aravinda@linux.vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/150659510129.25889.17733386928036958909.stgit@aravinda/mbox/","series":[{"id":5534,"url":"http://patchwork.ozlabs.org/api/series/5534/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=5534","date":"2017-09-28T10:37:28","name":"target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests","version":5,"mbox":"http://patchwork.ozlabs.org/series/5534/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/819532/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/819532/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2rq20LQbz9t38\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 20:42:06 +1000 (AEST)","from localhost ([::1]:58385 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dxWGZ-0006Le-G1\n\tfor incoming@patchwork.ozlabs.org; Thu, 28 Sep 2017 06:42:03 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:50704)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <aravinda@linux.vnet.ibm.com>) id 1dxWDE-00044n-DA\n\tfor qemu-devel@nongnu.org; Thu, 28 Sep 2017 06:38:40 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <aravinda@linux.vnet.ibm.com>) id 1dxWDA-0007qH-Dq\n\tfor qemu-devel@nongnu.org; Thu, 28 Sep 2017 06:38:36 -0400","from mx0b-001b2d01.pphosted.com ([148.163.158.5]:57854\n\thelo=mx0a-001b2d01.pphosted.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <aravinda@linux.vnet.ibm.com>)\n\tid 1dxWDA-0007qB-86\n\tfor qemu-devel@nongnu.org; Thu, 28 Sep 2017 06:38:32 -0400","from pps.filterd (m0098417.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8SAYAPf071931\n\tfor <qemu-devel@nongnu.org>; Thu, 28 Sep 2017 06:38:31 -0400","from e36.co.us.ibm.com (e36.co.us.ibm.com [32.97.110.154])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2d8w9mqkq4-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <qemu-devel@nongnu.org>; Thu, 28 Sep 2017 06:38:31 -0400","from localhost\n\tby e36.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tThu, 28 Sep 2017 04:38:28 -0600","from b03ledav003.gho.boulder.ibm.com\n\t(b03ledav003.gho.boulder.ibm.com [9.17.130.234])\n\tby b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v8SAcQoc65208512; Thu, 28 Sep 2017 03:38:26 -0700","from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 725916A0E6;\n\tThu, 28 Sep 2017 04:38:26 -0600 (MDT)","from [127.0.1.1] (unknown [9.84.218.194])\n\tby b03ledav003.gho.boulder.ibm.com (Postfix) with ESMTP id 0B12D6A0EF;\n\tThu, 28 Sep 2017 04:38:22 -0600 (MDT)"],"From":"Aravinda Prasad <aravinda@linux.vnet.ibm.com>","To":"qemu-ppc@nongnu.org, qemu-devel@nongnu.org, david@gibson.dropbear.id.au","Date":"Thu, 28 Sep 2017 16:08:21 +0530","In-Reply-To":"<150659494872.25889.2069124544245723984.stgit@aravinda>","References":"<150659494872.25889.2069124544245723984.stgit@aravinda>","User-Agent":"StGit/0.17.1-dirty","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","X-TM-AS-GCONF":"00","x-cbid":"17092810-0020-0000-0000-00000CC61FDA","X-IBM-SpamModules-Scores":"","X-IBM-SpamModules-Versions":"BY=3.00007804; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000232; SDB=6.00923539; UDB=6.00464295;\n\tIPR=6.00703677; \n\tBA=6.00005611; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017301;\n\tXFM=3.00000015; UTC=2017-09-28 10:38:30","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17092810-0021-0000-0000-00005E4EAB34","Message-Id":"<150659510129.25889.17733386928036958909.stgit@aravinda>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-28_04:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709280158","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy]","X-Received-From":"148.163.158.5","Subject":"[Qemu-devel] [PATCH v5 5/6] ppc: spapr: Enable FWNMI capability","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"aik@ozlabs.ru, benh@au1.ibm.com, paulus@samba.org,\n\tsam.bobroff@au1.ibm.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"Enable the KVM capability KVM_CAP_PPC_FWNMI so that\nthe KVM causes guest exit with NMI as exit reason\nwhen it encounters a machine check exception on the\naddress belonging to a guest. Without this capability\nenabled, KVM redirects machine check exceptions to\nguest's 0x200 vector.\n\nSigned-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>\n---\n hw/ppc/spapr_rtas.c  |   15 +++++++++++++++\n target/ppc/kvm.c     |   13 +++++++++++++\n target/ppc/kvm_ppc.h |    6 ++++++\n 3 files changed, 34 insertions(+)","diff":"diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c\nindex 08e9a5e..d017a67 100644\n--- a/hw/ppc/spapr_rtas.c\n+++ b/hw/ppc/spapr_rtas.c\n@@ -46,6 +46,7 @@\n #include \"qemu/cutils.h\"\n #include \"trace.h\"\n #include \"hw/ppc/fdt.h\"\n+#include \"kvm_ppc.h\"\n \n static void rtas_display_character(PowerPCCPU *cpu, sPAPRMachineState *spapr,\n                                    uint32_t token, uint32_t nargs,\n@@ -354,6 +355,20 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu,\n                                   target_ulong args,\n                                   uint32_t nret, target_ulong rets)\n {\n+    int ret;\n+\n+    ret = kvmppc_fwnmi_enable(cpu);\n+\n+    if (ret == 1) {\n+        rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);\n+        return;\n+    }\n+\n+    if (ret < 0) {\n+        rtas_st(rets, 0, RTAS_OUT_HW_ERROR);\n+        return;\n+    }\n+\n     spapr->guest_machine_check_addr = rtas_ld(args, 1);\n     rtas_st(rets, 0, RTAS_OUT_SUCCESS);\n }\ndiff --git a/target/ppc/kvm.c b/target/ppc/kvm.c\nindex 7e4ce02..59b3322 100644\n--- a/target/ppc/kvm.c\n+++ b/target/ppc/kvm.c\n@@ -92,6 +92,7 @@ static int cap_mmu_radix;\n static int cap_mmu_hash_v3;\n static int cap_resize_hpt;\n static int cap_ppc_pvr_compat;\n+static int cap_fwnmi;\n \n static uint32_t debug_inst_opcode;\n \n@@ -150,6 +151,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)\n     cap_mmu_radix = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX);\n     cap_mmu_hash_v3 = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3);\n     cap_resize_hpt = kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT);\n+    cap_fwnmi = kvm_check_extension(s, KVM_CAP_PPC_FWNMI);\n     /*\n      * Note: setting it to false because there is not such capability\n      * in KVM at this moment.\n@@ -2142,6 +2144,17 @@ void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)\n     }\n }\n \n+int kvmppc_fwnmi_enable(PowerPCCPU *cpu)\n+{\n+    CPUState *cs = CPU(cpu);\n+\n+    if (!cap_fwnmi) {\n+        return 1;\n+    }\n+\n+    return kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_FWNMI, 0);\n+}\n+\n int kvmppc_smt_threads(void)\n {\n     return cap_ppc_smt ? cap_ppc_smt : 1;\ndiff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h\nindex 0139dae..55b6df2 100644\n--- a/target/ppc/kvm_ppc.h\n+++ b/target/ppc/kvm_ppc.h\n@@ -28,6 +28,7 @@ void kvmppc_enable_clear_ref_mod_hcalls(void);\n void kvmppc_set_papr(PowerPCCPU *cpu);\n int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr);\n void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy);\n+int kvmppc_fwnmi_enable(PowerPCCPU *cpu);\n int kvmppc_smt_threads(void);\n void kvmppc_hint_smt_possible(Error **errp);\n int kvmppc_set_smt_threads(int smt);\n@@ -157,6 +158,11 @@ static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)\n {\n }\n \n+int kvmppc_fwnmi_enable(PowerPCCPU *cpu)\n+{\n+    return 1;\n+}\n+\n static inline int kvmppc_smt_threads(void)\n {\n     return 1;\n","prefixes":["v5","5/6"]}