{"id":819517,"url":"http://patchwork.ozlabs.org/api/patches/819517/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20170928095628.21966-3-thierry.reding@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170928095628.21966-3-thierry.reding@gmail.com>","list_archive_url":null,"date":"2017-09-28T09:56:14","name":"[v2,02/16] gpio: Move irqchip into struct gpio_irq_chip","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"95dc1ea82258dddeaf7f1b7746ea03897781dfb6","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/?format=json","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20170928095628.21966-3-thierry.reding@gmail.com/mbox/","series":[{"id":5528,"url":"http://patchwork.ozlabs.org/api/series/5528/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=5528","date":"2017-09-28T09:56:12","name":"gpio: Tight IRQ chip integration and banked infrastructure","version":2,"mbox":"http://patchwork.ozlabs.org/series/5528/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/819517/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/819517/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linux-tegra-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=noYTKrbIbdYx//CAiGIRW9+9uo31/0185QPKmKee8Kc=;\n\tb=jS1bcRh1fHUUtBg8IL4RcekERydSt7U6o9sWn6Vsnw0d5XKlZ4aYhsUwZUPKSqXNJq\n\tjKJqgC2+VZCm6WgQWjwnVRZgnzlseZDCeSQBNjSvWx1QNOzQ7FS5AVMb75AgnL2o0dqJ\n\tBepVqndd0+n0hSNQZV3xt/hdwvZTLOlYcVFAAIhDAhX4uJxiJzeQnc7oAVrihpECXjdu\n\tvx/PEwOqbgMH2Ur1vQ+xps6jCSb1v17MPSAfJ4Bkz2klS5Wbb3LatlCw/ze/WSMYbw+6\n\tkG2ONKn5gLgbIEOlTGYjB5WF1HIVuT1v2co+jGM2NySdCjQK3Fzo2VYzAZrnXrvJOtsf\n\tEVDg==","X-Gm-Message-State":"AMCzsaU95CPFuqJzDemcPmv/JIHUMO/pncOzMW2Ad57+JKyJ14MfhOAv\n\tcpHzjo8iNBiXiBFBJYJ5CaE=","X-Google-Smtp-Source":"AOwi7QAveWwTf7XOWzxgzt52kJz6dHFSsMnfwmsxlmkOKto2T54NjHAHxG56bm8XmZgPd8Y45+jZoQ==","X-Received":"by 10.55.18.13 with SMTP id c13mr322157qkh.81.1506592598259;\n\tThu, 28 Sep 2017 02:56:38 -0700 (PDT)","From":"Thierry Reding <thierry.reding@gmail.com>","To":"Linus Walleij <linus.walleij@linaro.org>","Cc":"Jonathan Hunter <jonathanh@nvidia.com>, linux-gpio@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org","Subject":"[PATCH v2 02/16] gpio: Move irqchip into struct gpio_irq_chip","Date":"Thu, 28 Sep 2017 11:56:14 +0200","Message-Id":"<20170928095628.21966-3-thierry.reding@gmail.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170928095628.21966-1-thierry.reding@gmail.com>","References":"<20170928095628.21966-1-thierry.reding@gmail.com>","Sender":"linux-tegra-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-tegra.vger.kernel.org>","X-Mailing-List":"linux-tegra@vger.kernel.org"},"content":"From: Thierry Reding <treding@nvidia.com>\n\nIn order to consolidate the multiple ways to associate an IRQ chip with\na GPIO chip, move more fields into the new struct gpio_irq_chip.\n\nSigned-off-by: Thierry Reding <treding@nvidia.com>\n---\n drivers/gpio/gpiolib.c      | 18 +++++++++---------\n include/linux/gpio/driver.h | 14 ++++++++++++--\n 2 files changed, 21 insertions(+), 11 deletions(-)","diff":"diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c\nindex b34d9cbd5809..450007ac1fc0 100644\n--- a/drivers/gpio/gpiolib.c\n+++ b/drivers/gpio/gpiolib.c\n@@ -1645,7 +1645,7 @@ int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,\n \t * category than their parents, so it won't report false recursion.\n \t */\n \tirq_set_lockdep_class(irq, chip->lock_key);\n-\tirq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler);\n+\tirq_set_chip_and_handler(irq, chip->irq.chip, chip->irq_handler);\n \t/* Chips that use nested thread handlers have them marked */\n \tif (chip->irq_nested)\n \t\tirq_set_nested_thread(irq, 1);\n@@ -1718,7 +1718,7 @@ static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)\n  */\n static int gpiochip_add_irqchip(struct gpio_chip *gpiochip)\n {\n-\tstruct irq_chip *irqchip = gpiochip->irqchip;\n+\tstruct irq_chip *irqchip = gpiochip->irq.chip;\n \tconst struct irq_domain_ops *ops;\n \tstruct device_node *np;\n \tunsigned int type;\n@@ -1847,7 +1847,7 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)\n \t\tirq_set_handler_data(gpiochip->irq_chained_parent, NULL);\n \t}\n \n-\tif (gpiochip->irqchip) {\n+\tif (gpiochip->irq.chip) {\n \t\tstruct gpio_irq_chip *irq = &gpiochip->irq;\n \t\tunsigned int i;\n \n@@ -1868,10 +1868,10 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)\n \t\tirq_domain_remove(gpiochip->irqdomain);\n \t}\n \n-\tif (gpiochip->irqchip) {\n-\t\tgpiochip->irqchip->irq_request_resources = NULL;\n-\t\tgpiochip->irqchip->irq_release_resources = NULL;\n-\t\tgpiochip->irqchip = NULL;\n+\tif (gpiochip->irq.chip) {\n+\t\tgpiochip->irq.chip->irq_request_resources = NULL;\n+\t\tgpiochip->irq.chip->irq_release_resources = NULL;\n+\t\tgpiochip->irq.chip = NULL;\n \t}\n \n \tgpiochip_irqchip_free_valid_mask(gpiochip);\n@@ -1946,7 +1946,7 @@ int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,\n \t\ttype = IRQ_TYPE_NONE;\n \t}\n \n-\tgpiochip->irqchip = irqchip;\n+\tgpiochip->irq.chip = irqchip;\n \tgpiochip->irq_handler = handler;\n \tgpiochip->irq_default_type = type;\n \tgpiochip->to_irq = gpiochip_to_irq;\n@@ -1955,7 +1955,7 @@ int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,\n \t\t\t\t\tgpiochip->ngpio, first_irq,\n \t\t\t\t\t&gpiochip_domain_ops, gpiochip);\n \tif (!gpiochip->irqdomain) {\n-\t\tgpiochip->irqchip = NULL;\n+\t\tgpiochip->irq.chip = NULL;\n \t\treturn -EINVAL;\n \t}\n \ndiff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h\nindex 6100b171817e..974247646886 100644\n--- a/include/linux/gpio/driver.h\n+++ b/include/linux/gpio/driver.h\n@@ -24,6 +24,13 @@ struct module;\n  * struct gpio_irq_chip - GPIO interrupt controller\n  */\n struct gpio_irq_chip {\n+\t/**\n+\t * @chip:\n+\t *\n+\t * GPIO IRQ chip implementation, provided by GPIO driver.\n+\t */\n+\tstruct irq_chip *chip;\n+\n \t/**\n \t * @domain_ops:\n \t *\n@@ -69,6 +76,11 @@ struct gpio_irq_chip {\n \t */\n \tunsigned int *map;\n };\n+\n+static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)\n+{\n+\treturn container_of(chip, struct gpio_irq_chip, chip);\n+}\n #endif\n \n /**\n@@ -132,7 +144,6 @@ struct gpio_irq_chip {\n  *\tsafely.\n  * @bgpio_dir: shadowed direction register for generic GPIO to clear/set\n  *\tdirection safely.\n- * @irqchip: GPIO IRQ chip impl, provided by GPIO driver\n  * @irqdomain: Interrupt translation domain; responsible for mapping\n  *\tbetween GPIO hwirq number and linux irq number\n  * @irq_base: first linux IRQ number assigned to GPIO IRQ chip (deprecated)\n@@ -215,7 +226,6 @@ struct gpio_chip {\n \t * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib\n \t * to handle IRQs for most practical cases.\n \t */\n-\tstruct irq_chip\t\t*irqchip;\n \tstruct irq_domain\t*irqdomain;\n \tunsigned int\t\tirq_base;\n \tirq_flow_handler_t\tirq_handler;\n","prefixes":["v2","02/16"]}