{"id":819505,"url":"http://patchwork.ozlabs.org/api/patches/819505/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20170928095628.21966-11-thierry.reding@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170928095628.21966-11-thierry.reding@gmail.com>","list_archive_url":null,"date":"2017-09-28T09:56:22","name":"[v2,10/16] gpio: Move lock_key into struct gpio_irq_chip","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"9f27d3a62424d1ddb52a98186ea7151a6c7c2538","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/?format=json","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20170928095628.21966-11-thierry.reding@gmail.com/mbox/","series":[{"id":5528,"url":"http://patchwork.ozlabs.org/api/series/5528/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=5528","date":"2017-09-28T09:56:12","name":"gpio: Tight IRQ chip integration and banked infrastructure","version":2,"mbox":"http://patchwork.ozlabs.org/series/5528/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/819505/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/819505/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linux-tegra-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-tegra-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"lsTFUGaB\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2qs62Wdpz9t5Y\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 19:58:50 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752930AbdI1J6e (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tThu, 28 Sep 2017 05:58:34 -0400","from mail-qk0-f196.google.com ([209.85.220.196]:33845 \"EHLO\n\tmail-qk0-f196.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752902AbdI1J47 (ORCPT\n\t<rfc822;linux-tegra@vger.kernel.org>);\n\tThu, 28 Sep 2017 05:56:59 -0400","by mail-qk0-f196.google.com with SMTP id d70so651305qkc.1;\n\tThu, 28 Sep 2017 02:56:59 -0700 (PDT)","from localhost\n\t(p200300E41BCC8100EA54DC343767CF80.dip0.t-ipconnect.de.\n\t[2003:e4:1bcc:8100:ea54:dc34:3767:cf80])\n\tby smtp.gmail.com with ESMTPSA id\n\tx124sm728980qka.85.2017.09.28.02.56.57\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tThu, 28 Sep 2017 02:56:57 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=yB2VnxaH7q0xVnggmX04kvbr5GKMqQKqZaAT8I+CBT8=;\n\tb=lsTFUGaBoJaiyph6Fat6Xclr/9sZI8JJ+gkegS04EjwbwlWO/0BZlfvHS/bcfNCxrX\n\tpUhXRjCCVB2qHL1E6Iix7+f9+EU+JR3gicv/cYNoJLxb+s9oe5i96n0MVKSVdP3//7zT\n\tQYYeoGOSpZ6dANoT2RXEUuOG0K3PzOHm7sYx5wRDFDOJ7pruwNCvMYFVvt0sBpOiBMlK\n\tRJOxj5gVrXwdKTsM4HAf8B+nuJQi0velQekb65kr8pm9fsTCCokf8aKp+Hvg3DIhh30F\n\tywBOJnhM/1Dqp2B0OAjt/+GkwBb+IFmgTIQ9CG4mbc01O1wpRKOQE6T/x79YEZNK/t2b\n\t0amg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=yB2VnxaH7q0xVnggmX04kvbr5GKMqQKqZaAT8I+CBT8=;\n\tb=eXPyBJC77tXW/RGo58dYmvJ+8e79764ezJ0urQaJ3xuXtlx7j4DA1ek6tlBYfYoaXX\n\tQaa2dVbWwbkxiPdVKCRkQxZrv6U2gtOoAzGAshSvu/whE37TnxKYxijmrPfU9nUGK8KU\n\toQYmMYDnIE4a5Zz+CzUrpizlWJyTTz4ZdMvmGzqFtZxMdZLXO3yw7+wqt+Ce5MrqMhM1\n\thQ5LY7jU64zaNC87/YLXqVyCm/1AZNLPEM/o2VDbOj0GR5IE6bGqtY38P7cJWYaxErvV\n\t1laj/JPgPPUSlWDYscOByL/3WppLXaK7uNLzI9J5MSawcfNhSHUxTJJ9Iv8UeeI82y0b\n\t9CvA==","X-Gm-Message-State":"AMCzsaXX3zQDBjKDTQ+hth/n5LVSBc4uexsOtDePZt6KYcutSePothZE\n\t/c3ILiSEW3MlFieHkmXRMKk=","X-Google-Smtp-Source":"AOwi7QAhZ91wf/YocpJzX0JVRO7kB3SV1BoSbOGJMZEn53pHU8UV0tb49tbg6D61W5EhPmpwCHtJUw==","X-Received":"by 10.55.5.21 with SMTP id 21mr5754171qkf.184.1506592618362;\n\tThu, 28 Sep 2017 02:56:58 -0700 (PDT)","From":"Thierry Reding <thierry.reding@gmail.com>","To":"Linus Walleij <linus.walleij@linaro.org>","Cc":"Jonathan Hunter <jonathanh@nvidia.com>, linux-gpio@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org","Subject":"[PATCH v2 10/16] gpio: Move lock_key into struct gpio_irq_chip","Date":"Thu, 28 Sep 2017 11:56:22 +0200","Message-Id":"<20170928095628.21966-11-thierry.reding@gmail.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170928095628.21966-1-thierry.reding@gmail.com>","References":"<20170928095628.21966-1-thierry.reding@gmail.com>","Sender":"linux-tegra-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-tegra.vger.kernel.org>","X-Mailing-List":"linux-tegra@vger.kernel.org"},"content":"From: Thierry Reding <treding@nvidia.com>\n\nIn order to consolidate the multiple ways to associate an IRQ chip with\na GPIO chip, move more fields into the new struct gpio_irq_chip.\n\nSigned-off-by: Thierry Reding <treding@nvidia.com>\n---\n drivers/gpio/gpiolib.c      | 4 ++--\n include/linux/gpio/driver.h | 9 +++++++--\n 2 files changed, 9 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c\nindex 4d140eb27d5b..c15fb858848a 100644\n--- a/drivers/gpio/gpiolib.c\n+++ b/drivers/gpio/gpiolib.c\n@@ -1645,7 +1645,7 @@ int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,\n \t * This lock class tells lockdep that GPIO irqs are in a different\n \t * category than their parents, so it won't report false recursion.\n \t */\n-\tirq_set_lockdep_class(irq, chip->lock_key);\n+\tirq_set_lockdep_class(irq, chip->irq.lock_key);\n \tirq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler);\n \t/* Chips that use nested thread handlers have them marked */\n \tif (chip->irq.nested)\n@@ -1948,7 +1948,7 @@ int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,\n \tgpiochip->irq.handler = handler;\n \tgpiochip->irq.default_type = type;\n \tgpiochip->to_irq = gpiochip_to_irq;\n-\tgpiochip->lock_key = lock_key;\n+\tgpiochip->irq.lock_key = lock_key;\n \tgpiochip->irq.domain = irq_domain_add_simple(of_node,\n \t\t\t\t\tgpiochip->ngpio, first_irq,\n \t\t\t\t\t&gpiochip_domain_ops, gpiochip);\ndiff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h\nindex f8d31e7da9cc..c453e0716228 100644\n--- a/include/linux/gpio/driver.h\n+++ b/include/linux/gpio/driver.h\n@@ -70,6 +70,13 @@ struct gpio_irq_chip {\n \t */\n \tunsigned int default_type;\n \n+\t/**\n+\t * @lock_key:\n+\t *\n+\t * Per GPIO IRQ chip lockdep class.\n+\t */\n+\tstruct lock_class_key *lock_key;\n+\n \t/**\n \t * @parent_handler:\n \t *\n@@ -198,7 +205,6 @@ static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)\n  *\tsafely.\n  * @bgpio_dir: shadowed direction register for generic GPIO to clear/set\n  *\tdirection safely.\n- * @lock_key: per GPIO IRQ chip lockdep class\n  *\n  * A gpio_chip can help platforms abstract various sources of GPIOs so\n  * they can all be accessed through a common programing interface.\n@@ -265,7 +271,6 @@ struct gpio_chip {\n \t * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib\n \t * to handle IRQs for most practical cases.\n \t */\n-\tstruct lock_class_key\t*lock_key;\n \n \t/**\n \t * @irq:\n","prefixes":["v2","10/16"]}