{"id":819432,"url":"http://patchwork.ozlabs.org/api/patches/819432/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20170928075149.8154-3-joel@jms.id.au/","project":{"id":57,"url":"http://patchwork.ozlabs.org/api/projects/57/?format=json","name":"Linux ASPEED SoC development","link_name":"linux-aspeed","list_id":"linux-aspeed.lists.ozlabs.org","list_email":"linux-aspeed@lists.ozlabs.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170928075149.8154-3-joel@jms.id.au>","list_archive_url":null,"date":"2017-09-28T07:51:43","name":"[2/8] ARM: dts: aspeed: Reorder ADC node","commit_ref":null,"pull_url":null,"state":"superseded","archived":true,"hash":"9516ce9ccd1f4a406475b11c68f1d4dfd2d3d55a","submitter":{"id":48628,"url":"http://patchwork.ozlabs.org/api/people/48628/?format=json","name":"Joel Stanley","email":"joel@jms.id.au"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/20170928075149.8154-3-joel@jms.id.au/mbox/","series":[{"id":5506,"url":"http://patchwork.ozlabs.org/api/series/5506/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=5506","date":"2017-09-28T07:51:41","name":"ARM: dts: aspeed: Device tree updates","version":1,"mbox":"http://patchwork.ozlabs.org/series/5506/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/819432/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/819432/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2n3P2dcNz9t5l\n\tfor ;\n\tThu, 28 Sep 2017 17:52:33 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3y2n3N71b2zDsPp\n\tfor ;\n\tThu, 28 Sep 2017 17:52:32 +1000 (AEST)","from mail-pf0-x244.google.com (mail-pf0-x244.google.com\n\t[IPv6:2607:f8b0:400e:c00::244])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3y2n3K6ZJ0zDsPp\n\tfor ;\n\tThu, 28 Sep 2017 17:52:29 +1000 (AEST)","by mail-pf0-x244.google.com with SMTP id h4so804639pfk.0\n\tfor ;\n\tThu, 28 Sep 2017 00:52:29 -0700 (PDT)","from aurora.jms.id.au ([203.0.153.9])\n\tby smtp.gmail.com with ESMTPSA id\n\tr66sm1728992pfl.15.2017.09.28.00.52.21\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tThu, 28 Sep 2017 00:52:26 -0700 (PDT)","by aurora.jms.id.au (sSMTP sendmail emulation);\n\tThu, 28 Sep 2017 17:22:18 +0930"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"H9zvZ8X/\"; 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The ADC node was out of\nplace.\n\nSigned-off-by: Joel Stanley \n---\n arch/arm/boot/dts/aspeed-g4.dtsi | 16 ++++++++--------\n arch/arm/boot/dts/aspeed-g5.dtsi | 16 ++++++++--------\n 2 files changed, 16 insertions(+), 16 deletions(-)","diff":"diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi\nindex 1edd0cee6221..a4579498fc25 100644\n--- a/arch/arm/boot/dts/aspeed-g4.dtsi\n+++ b/arch/arm/boot/dts/aspeed-g4.dtsi\n@@ -129,6 +129,14 @@\n \t\t\t\t};\n \t\t\t};\n \n+\t\t\tadc: adc@1e6e9000 {\n+\t\t\t\tcompatible = \"aspeed,ast2400-adc\";\n+\t\t\t\treg = <0x1e6e9000 0xb0>;\n+\t\t\t\tclocks = <&syscon ASPEED_CLK_APB>;\n+\t\t\t\t#io-channel-cells = <1>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n \t\t\tsram@1e720000 {\n \t\t\t\tcompatible = \"mmio-sram\";\n \t\t\t\treg = <0x1e720000 0x8000>;\t// 32K\n@@ -227,14 +235,6 @@\n \t\t\t\tno-loopback-test;\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n-\n-\t\t\tadc: adc@1e6e9000 {\n-\t\t\t\tcompatible = \"aspeed,ast2400-adc\";\n-\t\t\t\treg = <0x1e6e9000 0xb0>;\n-\t\t\t\tclocks = <&clk_apb>;\n-\t\t\t\t#io-channel-cells = <1>;\n-\t\t\t\tstatus = \"disabled\";\n-\t\t\t};\n \t\t};\n \t};\n };\ndiff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi\nindex f56dd67efa50..f6430b313f90 100644\n--- a/arch/arm/boot/dts/aspeed-g5.dtsi\n+++ b/arch/arm/boot/dts/aspeed-g5.dtsi\n@@ -173,6 +173,14 @@\n \t\t\t\treg-io-width = <4>;\n \t\t\t};\n \n+\t\t\tadc: adc@1e6e9000 {\n+\t\t\t\tcompatible = \"aspeed,ast2500-adc\";\n+\t\t\t\treg = <0x1e6e9000 0xb0>;\n+\t\t\t\tclocks = <&syscon ASPEED_CLK_APB>;\n+\t\t\t\t#io-channel-cells = <1>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n \t\t\tsram@1e720000 {\n \t\t\t\tcompatible = \"mmio-sram\";\n \t\t\t\treg = <0x1e720000 0x9000>;\t// 36K\n@@ -307,14 +315,6 @@\n \t\t\t\tno-loopback-test;\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n-\n-\t\t\tadc: adc@1e6e9000 {\n-\t\t\t\tcompatible = \"aspeed,ast2500-adc\";\n-\t\t\t\treg = <0x1e6e9000 0xb0>;\n-\t\t\t\tclocks = <&clk_apb>;\n-\t\t\t\t#io-channel-cells = <1>;\n-\t\t\t\tstatus = \"disabled\";\n-\t\t\t};\n \t\t};\n \t};\n };\n","prefixes":["2/8"]}